>>> yosys: Building testing/yosys 0.66-r0 (using abuild 3.18.0_rc3-r1) started Wed, 15 Jul 2026 03:22:47 +0000 >>> yosys: Validating /home/buildozer/aports/testing/yosys/APKBUILD... >>> yosys: Analyzing dependencies... >>> yosys: Installing for build: build-base abc bash bison boost-dev flex-dev gawk graphviz-dev libffi-dev lld protobuf-dev py3-cxxheaderparser py3-pybind11-dev python3 readline-dev tcl-dev zlib-dev gtest-dev gtkwave iverilog ( 1/368) Installing readline (8.3.3-r1) ( 2/368) Installing abc (0_git20260515-r0) ( 3/368) Installing bash (5.3.9-r1) Executing bash-5.3.9-r1.post-install ( 4/368) Installing m4 (1.4.21-r0) ( 5/368) Installing bison (3.8.2-r3) ( 6/368) Installing boost1.84-atomic (1.84.0-r6) ( 7/368) Installing boost1.84-chrono (1.84.0-r6) ( 8/368) Installing boost1.84-container (1.84.0-r6) ( 9/368) Installing boost1.84-context (1.84.0-r6) ( 10/368) Installing boost1.84-contract (1.84.0-r6) ( 11/368) Installing boost1.84-coroutine (1.84.0-r6) ( 12/368) Installing boost1.84-date_time (1.84.0-r6) ( 13/368) Installing boost1.84-fiber (1.84.0-r6) ( 14/368) Installing boost1.84-filesystem (1.84.0-r6) ( 15/368) Installing boost1.84-graph (1.84.0-r6) ( 16/368) Installing libbz2 (1.0.8-r6) ( 17/368) Installing xz-libs (5.8.3-r0) ( 18/368) Installing boost1.84-iostreams (1.84.0-r6) ( 19/368) Installing boost1.84-thread (1.84.0-r6) ( 20/368) Installing icu-data-en (78.1-r0) Executing icu-data-en-78.1-r0.post-install * If you need ICU with non-English locales and legacy charset support, install * package icu-data-full. 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boost1.84-stacktrace_noop (1.84.0-r6) ( 42/368) Installing boost1.84-system (1.84.0-r6) ( 43/368) Installing boost1.84-timer (1.84.0-r6) ( 44/368) Installing boost1.84-type_erasure (1.84.0-r6) ( 45/368) Installing boost1.84-unit_test_framework (1.84.0-r6) ( 46/368) Installing boost1.84-url (1.84.0-r6) ( 47/368) Installing boost1.84-wave (1.84.0-r6) ( 48/368) Installing boost1.84-wserialization (1.84.0-r6) ( 49/368) Installing boost1.84-json (1.84.0-r6) ( 50/368) Installing boost1.84-nowide (1.84.0-r6) ( 51/368) Installing boost1.84-libs (1.84.0-r6) ( 52/368) Installing boost1.84 (1.84.0-r6) ( 53/368) Installing linux-headers (7.1.3-r0) ( 54/368) Installing bzip2-dev (1.0.8-r6) ( 55/368) Installing icu (78.1-r0) ( 56/368) Installing icu-dev (78.1-r0) ( 57/368) Installing xz (5.8.3-r0) ( 58/368) Installing xz-dev (5.8.3-r0) ( 59/368) Installing zlib-dev (1.3.2-r0) ( 60/368) Installing zstd (1.5.7-r2) ( 61/368) Installing zstd-dev (1.5.7-r2) ( 62/368) Installing boost1.84-dev (1.84.0-r6) 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cairo-gobject (1.18.4-r1) ( 88/368) Installing expat (2.8.2-r0) ( 89/368) Installing expat-dev (2.8.2-r0) ( 90/368) Installing brotli (1.2.0-r1) ( 91/368) Installing brotli-dev (1.2.0-r1) ( 92/368) Installing libpng-dev (1.6.58-r1) ( 93/368) Installing freetype-dev (2.14.3-r0) ( 94/368) Installing fontconfig-dev (2.18.1-r0) ( 95/368) Installing libxml2 (2.13.9-r2) ( 96/368) Installing libxml2-utils (2.13.9-r2) ( 97/368) Installing docbook-xml (4.5-r10) Executing docbook-xml-4.5-r10.post-install ( 98/368) Installing libxslt (1.1.43-r3) ( 99/368) Installing docbook-xsl-ns (1.79.2-r13) Executing docbook-xsl-ns-1.79.2-r13.post-install (100/368) Installing docbook-xsl-nons (1.79.2-r13) Executing docbook-xsl-nons-1.79.2-r13.post-install (101/368) Installing docbook-xsl (1.79.2-r13) (102/368) Installing gettext-asprintf (1.0-r0) (103/368) Installing gettext-libs (1.0-r0) (104/368) Installing gettext-envsubst (1.0-r0) (105/368) Installing gettext (1.0-r0) (106/368) Installing gettext-dev (1.0-r0) (107/368) Installing py3-parsing (3.3.2-r1) (108/368) Installing py3-parsing-pyc (3.3.2-r1) (109/368) Installing py3-packaging (26.2-r0) (110/368) Installing py3-packaging-pyc (26.2-r0) (111/368) Installing libffi-dev (3.5.2-r1) (112/368) Installing bsd-compat-headers (0.7.2-r6) (113/368) Installing libformw (6.6_p20260516-r0) (114/368) Installing libmenuw (6.6_p20260516-r0) (115/368) Installing libncurses++ (6.6_p20260516-r0) (116/368) Installing ncurses-dev (6.6_p20260516-r0) (117/368) Installing libedit-dev (20260508.3.1-r1) (118/368) Installing libpcre2-16 (10.47-r1) (119/368) Installing libpcre2-32 (10.47-r1) (120/368) Installing pcre2-dev (10.47-r1) (121/368) Installing libuuid (2.42.2-r0) (122/368) Installing libfdisk (2.42.2-r0) (123/368) Installing skalibs-libs (2.15.1.0-r0) (124/368) Installing utmps-libs (0.1.3.4-r0) (125/368) Installing linux-pam (1.7.1-r2) (126/368) Installing liblastlog2 (2.42.2-r0) (127/368) Installing libsmartcols (2.42.2-r0) (128/368) Installing sqlite (3.53.3-r0) (129/368) Installing sqlite-dev (3.53.3-r0) (130/368) Installing util-linux-dev (2.42.2-r0) (131/368) Installing glib-dev (2.88.2-r0) (132/368) Installing pixman-dev (0.46.4-r0) (133/368) Installing xorgproto (2025.1-r0) (134/368) Installing libxau-dev (1.0.12-r0) (135/368) Installing xcb-proto (1.17.0-r1) (136/368) Installing xcb-proto-pyc (1.17.0-r1) (137/368) Installing libxdmcp-dev (1.1.5-r1) (138/368) Installing libxcb-dev (1.17.0-r2) (139/368) Installing xtrans (1.6.0-r0) (140/368) Installing libx11-dev (1.8.13-r0) (141/368) Installing libxext-dev (1.3.7-r0) (142/368) Installing libxrender-dev (0.9.12-r0) (143/368) Installing cairo-dev (1.18.4-r1) (144/368) Installing libice (1.1.2-r0) (145/368) Installing libsm (1.2.6-r0) (146/368) Installing libxt (1.3.1-r0) (147/368) Installing libxpm (3.5.19-r0) (148/368) Installing aom-libs (3.14.1-r0) (149/368) Installing libdav1d (1.5.3-r0) (150/368) Installing libjpeg-turbo (3.1.3-r0) (151/368) Installing libyuv (0.0.1928-r0) (152/368) Installing libavif (1.4.2-r0) (153/368) Installing libsharpyuv (1.6.0-r0) (154/368) Installing libwebp (1.6.0-r0) (155/368) Installing tiff (4.7.1-r0) (156/368) Installing libgd (2.3.3-r10) (157/368) Installing gd (2.3.3-r10) (158/368) Installing perl (5.42.2-r0) (159/368) Installing aom (3.14.1-r0) (160/368) Installing aom-dev (3.14.1-r0) (161/368) Installing dav1d-dev (1.5.3-r0) (162/368) Installing libavif-dev (1.4.2-r0) (163/368) Installing libturbojpeg (3.1.3-r0) (164/368) Installing libjpeg-turbo-dev (3.1.3-r0) (165/368) Installing libtiffxx (4.7.1-r0) (166/368) Installing libwebpdecoder (1.6.0-r0) (167/368) Installing libwebpdemux (1.6.0-r0) (168/368) Installing libwebpmux (1.6.0-r0) (169/368) Installing libwebp-dev (1.6.0-r0) (170/368) Installing tiff-dev (4.7.1-r0) (171/368) Installing libxpm-dev (3.5.19-r0) (172/368) Installing gd-dev (2.3.3-r10) (173/368) Installing libgmpxx (6.3.0-r4) (174/368) Installing gmp-dev (6.3.0-r4) (175/368) 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scudo-malloc (22.1.8-r0) (198/368) Installing lld22 (22.1.8-r0) (199/368) Installing abseil-cpp-raw-logging-internal (20260526.0-r0) (200/368) Installing abseil-cpp-spinlock-wait (20260526.0-r0) (201/368) Installing abseil-cpp-base (20260526.0-r0) (202/368) Installing abseil-cpp-city (20260526.0-r0) (203/368) Installing abseil-cpp-civil-time (20260526.0-r0) (204/368) Installing abseil-cpp-int128 (20260526.0-r0) (205/368) Installing abseil-cpp-strings-internal (20260526.0-r0) (206/368) Installing abseil-cpp-throw-delegate (20260526.0-r0) (207/368) Installing abseil-cpp-strings (20260526.0-r0) (208/368) Installing abseil-cpp-time-zone (20260526.0-r0) (209/368) Installing abseil-cpp-time (20260526.0-r0) (210/368) Installing abseil-cpp-kernel-timeout-internal (20260526.0-r0) (211/368) Installing abseil-cpp-malloc-internal (20260526.0-r0) (212/368) Installing abseil-cpp-debugging-internal (20260526.0-r0) (213/368) Installing abseil-cpp-stacktrace (20260526.0-r0) (214/368) Installing abseil-cpp-tracing-internal (20260526.0-r0) (215/368) Installing abseil-cpp-synchronization (20260526.0-r0) (216/368) Installing abseil-cpp-clock-interface (20260526.0-r0) (217/368) Installing abseil-cpp-crc-internal (20260526.0-r0) (218/368) Installing abseil-cpp-crc32c (20260526.0-r0) (219/368) Installing abseil-cpp-crc-cord-state (20260526.0-r0) (220/368) Installing abseil-cpp-cord-internal (20260526.0-r0) (221/368) Installing abseil-cpp-exponential-biased (20260526.0-r0) (222/368) Installing abseil-cpp-cordz-functions (20260526.0-r0) (223/368) Installing abseil-cpp-cordz-handle (20260526.0-r0) (224/368) Installing abseil-cpp-cordz-info (20260526.0-r0) (225/368) Installing abseil-cpp-cord (20260526.0-r0) (226/368) Installing abseil-cpp-cordz-sample-token (20260526.0-r0) (227/368) Installing abseil-cpp-crc-cpu-detect (20260526.0-r0) (228/368) Installing abseil-cpp-utf8-for-code-point (20260526.0-r0) (229/368) Installing abseil-cpp-decode-rust-punycode (20260526.0-r0) (230/368) Installing abseil-cpp-demangle-rust (20260526.0-r0) (231/368) Installing abseil-cpp-demangle-internal (20260526.0-r0) (232/368) Installing abseil-cpp-symbolize (20260526.0-r0) (233/368) Installing abseil-cpp-examine-stack (20260526.0-r0) (234/368) Installing abseil-cpp-hash (20260526.0-r0) (235/368) Installing abseil-cpp-log-globals (20260526.0-r0) (236/368) Installing abseil-cpp-log-internal-globals (20260526.0-r0) (237/368) Installing abseil-cpp-str-format-internal (20260526.0-r0) (238/368) Installing abseil-cpp-log-internal-format (20260526.0-r0) (239/368) Installing abseil-cpp-log-sink (20260526.0-r0) (240/368) Installing abseil-cpp-log-internal-log-sink-set (20260526.0-r0) (241/368) Installing abseil-cpp-log-internal-nullguard (20260526.0-r0) (242/368) Installing abseil-cpp-log-internal-proto (20260526.0-r0) (243/368) Installing abseil-cpp-log-internal-structured-proto (20260526.0-r0) (244/368) Installing abseil-cpp-strerror (20260526.0-r0) (245/368) Installing abseil-cpp-log-internal-message (20260526.0-r0) (246/368) Installing abseil-cpp-die-if-null (20260526.0-r0) (247/368) Installing gtest (1.17.0-r1) (248/368) Installing abseil-cpp-exception-safety-testing (20260526.0-r0) (249/368) Installing abseil-cpp-failure-signal-handler (20260526.0-r0) (250/368) Installing abseil-cpp-flags-commandlineflag-internal (20260526.0-r0) (251/368) Installing abseil-cpp-flags-commandlineflag (20260526.0-r0) (252/368) Installing abseil-cpp-flags-program-name (20260526.0-r0) (253/368) Installing abseil-cpp-flags-config (20260526.0-r0) (254/368) Installing abseil-cpp-flags-internal (20260526.0-r0) (255/368) Installing abseil-cpp-flags-marshalling (20260526.0-r0) (256/368) Installing abseil-cpp-flags-private-handle-accessor (20260526.0-r0) (257/368) Installing abseil-cpp-hashtablez-sampler (20260526.0-r0) (258/368) Installing abseil-cpp-raw-hash-set (20260526.0-r0) (259/368) Installing abseil-cpp-flags-reflection (20260526.0-r0) (260/368) Installing abseil-cpp-flags-usage (20260526.0-r0) (261/368) Installing abseil-cpp-flags-usage-internal (20260526.0-r0) (262/368) Installing abseil-cpp-flags-parse (20260526.0-r0) (263/368) Installing abseil-cpp-generic-printer-internal (20260526.0-r0) (264/368) Installing abseil-cpp-graphcycles-internal (20260526.0-r0) (265/368) Installing abseil-cpp-random-internal-platform (20260526.0-r0) (266/368) Installing abseil-cpp-random-internal-randen-slow (20260526.0-r0) (267/368) Installing abseil-cpp-random-internal-randen (20260526.0-r0) (268/368) Installing abseil-cpp-random-internal-seed-material (20260526.0-r0) (269/368) Installing abseil-cpp-random-seed-gen-exception (20260526.0-r0) (270/368) Installing abseil-cpp-random-internal-entropy-pool (20260526.0-r0) (271/368) Installing abseil-cpp-hash-generator-testing (20260526.0-r0) (272/368) Installing abseil-cpp-profile-builder (20260526.0-r0) (273/368) Installing abseil-cpp-hashtable-profiler (20260526.0-r0) (274/368) Installing abseil-cpp-leak-check (20260526.0-r0) (275/368) Installing abseil-cpp-log-severity (20260526.0-r0) (276/368) Installing abseil-cpp-log-entry (20260526.0-r0) (277/368) Installing abseil-cpp-log-internal-fnmatch (20260526.0-r0) (278/368) Installing abseil-cpp-vlog-config-internal (20260526.0-r0) (279/368) Installing abseil-cpp-log-flags (20260526.0-r0) (280/368) Installing abseil-cpp-log-initialize (20260526.0-r0) (281/368) Installing abseil-cpp-log-internal-check-op (20260526.0-r0) (282/368) Installing abseil-cpp-log-internal-conditions (20260526.0-r0) (283/368) Installing abseil-cpp-log-internal-test-actions (20260526.0-r0) (284/368) Installing abseil-cpp-log-internal-test-helpers (20260526.0-r0) (285/368) Installing abseil-cpp-log-internal-test-matchers (20260526.0-r0) (286/368) Installing abseil-cpp-per-thread-sem-test-common (20260526.0-r0) (287/368) Installing abseil-cpp-periodic-sampler (20260526.0-r0) (288/368) Installing abseil-cpp-poison (20260526.0-r0) (289/368) Installing abseil-cpp-pow10-helper (20260526.0-r0) (290/368) Installing abseil-cpp-random-distributions (20260526.0-r0) (291/368) Installing abseil-cpp-random-internal-distribution-test-util (20260526.0-r0) (292/368) Installing abseil-cpp-random-internal-randen-hwaes-impl (20260526.0-r0) (293/368) Installing abseil-cpp-random-internal-randen-hwaes (20260526.0-r0) (294/368) Installing abseil-cpp-random-seed-sequences (20260526.0-r0) (295/368) Installing gmock (1.17.0-r1) (296/368) Installing abseil-cpp-scoped-mock-log (20260526.0-r0) (297/368) Installing abseil-cpp-scoped-set-env (20260526.0-r0) (298/368) Installing abseil-cpp-simulated-clock (20260526.0-r0) (299/368) Installing abseil-cpp-source-location (20260526.0-r0) (300/368) Installing abseil-cpp-spinlock-test-common (20260526.0-r0) (301/368) Installing abseil-cpp-stack-consumption (20260526.0-r0) (302/368) Installing abseil-cpp-status (20260526.0-r0) (303/368) Installing abseil-cpp-status-builder (20260526.0-r0) (304/368) Installing abseil-cpp-status-matchers (20260526.0-r0) (305/368) Installing abseil-cpp-statusor (20260526.0-r0) (306/368) Installing abseil-cpp-test-instance-tracker (20260526.0-r0) (307/368) Installing abseil-cpp-time-internal-test-util (20260526.0-r0) (308/368) Installing abseil-cpp-dev (20260526.0-r0) (309/368) Installing libprotobuf-lite (31.1-r2) (310/368) Installing protobuf (31.1-r2) (311/368) Installing libprotobuf (31.1-r2) (312/368) Installing libprotoc (31.1-r2) (313/368) Installing protoc (31.1-r2) (314/368) Installing protobuf-dev (31.1-r2) (315/368) Installing py3-cxxheaderparser (1.7.0-r1) (316/368) Installing py3-cxxheaderparser-pyc (1.7.0-r1) (317/368) Installing py3-pybind11 (3.0.4-r0) (318/368) Installing py3-pybind11-pyc (3.0.4-r0) (319/368) Installing py3-pybind11-dev (3.0.4-r0) (320/368) Installing libhistory (8.3.3-r1) (321/368) Installing readline-dev (8.3.3-r1) (322/368) Installing tzdata (2026c-r0) (323/368) Installing tcl (8.6.17-r1) (324/368) Installing tcl-dev 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>>> yosys: Cleaning up srcdir >>> yosys: Cleaning up pkgdir >>> yosys: Cleaning up tmpdir >>> yosys: Fetching https://distfiles.alpinelinux.org/distfiles/edge/yosys-0.66.tar.gz Connecting to distfiles.alpinelinux.org (172.105.82.32:443) wget: server returned error: HTTP/1.1 404 Not Found >>> yosys: Fetching yosys-0.66.tar.gz::https://github.com/YosysHQ/yosys/releases/download/v0.66/yosys-src.tar.gz Connecting to github.com (140.82.121.4:443) Connecting to release-assets.githubusercontent.com (185.199.109.133:443) saving to '/var/cache/distfiles/edge/yosys-0.66.tar.gz.part' yosys-0.66.tar.gz.pa 100% |********************************| 10.6M 0:00:00 ETA '/var/cache/distfiles/edge/yosys-0.66.tar.gz.part' saved /var/cache/distfiles/edge/yosys-0.66.tar.gz: OK /home/buildozer/aports/testing/yosys/fix-32-bit-oom.patch: OK /home/buildozer/aports/testing/yosys/fix-libyosys-python-link.patch: OK /home/buildozer/aports/testing/yosys/fix-pybind11-unused-parameter.patch: OK >>> yosys: Fetching https://distfiles.alpinelinux.org/distfiles/edge/yosys-0.66.tar.gz /var/cache/distfiles/edge/yosys-0.66.tar.gz: OK /home/buildozer/aports/testing/yosys/fix-32-bit-oom.patch: OK /home/buildozer/aports/testing/yosys/fix-libyosys-python-link.patch: OK /home/buildozer/aports/testing/yosys/fix-pybind11-unused-parameter.patch: OK >>> yosys: Unpacking /var/cache/distfiles/edge/yosys-0.66.tar.gz... >>> yosys: fix-32-bit-oom.patch patching file Makefile Hunk #1 succeeded at 789 (offset 7 lines). >>> yosys: fix-libyosys-python-link.patch patching file Makefile Hunk #1 succeeded at 781 (offset 3 lines). >>> yosys: fix-pybind11-unused-parameter.patch patching file kernel/yosys.cc patching file pyosys/hashlib.h [Makefile.conf] CONFIG:=gcc [Makefile.conf] PREFIX:=/usr [Makefile.conf] ABCEXTERNAL:=/usr/bin/abc [Makefile.conf] ENABLE_ABC:=1 [Makefile.conf] ENABLE_LIBYOSYS:=1 [Makefile.conf] ENABLE_NDEBUG:=1 [Makefile.conf] ENABLE_PROTOBUF:=1 [Makefile.conf] ENABLE_PYOSYS:=1 [Makefile.conf] PYOSYS_USE_UV:=0 [ 0%] Building kernel/version_7f8fdfd8d7bc08c749a2a969388d3425d4f369d5.cc [ 0%] Building pyosys/wrappers.cc [ 0%] Building kernel/driver.o [ 0%] Building techlibs/common/simlib_help.inc [ 0%] Building techlibs/common/simcells_help.inc [ 1%] Building kernel/rtlil.o [ 1%] Building kernel/log.o [ 1%] Building kernel/calc.o [ 2%] Building kernel/yosys.o [ 2%] Building kernel/io.o [ 2%] Building kernel/gzip.o [ 2%] Building kernel/rtlil_bufnorm.o [ 3%] Building kernel/log_help.o [ 3%] Building kernel/binding.o [ 3%] Building kernel/tclapi.o [ 3%] Building kernel/cellaigs.o [ 4%] Building kernel/celledges.o [ 4%] Building kernel/cost.o [ 4%] Building kernel/satgen.o [ 4%] Building kernel/scopeinfo.o [ 5%] Building kernel/qcsat.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/binding.h [ 5%] Building kernel/mem.o [ 5%] Building kernel/ffmerge.o [ 6%] Building kernel/ff.o [ 6%] Building kernel/yw.o [ 6%] Building kernel/json.o [ 6%] Building kernel/fmt.o [ 7%] Building kernel/sexpr.o [ 7%] Building kernel/drivertools.o [ 7%] Building kernel/functional.o [ 7%] Building kernel/threading.o [ 8%] Building kernel/fstdata.o [ 8%] Building libs/bigint/BigIntegerAlgorithms.o [ 8%] Building libs/bigint/BigInteger.o [ 8%] Building libs/bigint/BigIntegerUtils.o [ 9%] Building libs/bigint/BigUnsigned.o [ 9%] Building libs/bigint/BigUnsignedInABase.o [ 9%] Building libs/sha1/sha1.o [ 9%] Building libs/json11/json11.o [ 10%] Building libs/ezsat/ezsat.o [ 10%] Building libs/ezsat/ezminisat.o [ 10%] Building libs/ezsat/ezcmdline.o [ 11%] Building libs/minisat/Options.o [ 11%] Building libs/minisat/SimpSolver.o [ 11%] Building libs/minisat/Solver.o [ 11%] Building libs/minisat/System.o [ 12%] Building libs/fst/fstapi.o [ 12%] Building libs/fst/fastlz.o [ 12%] Building libs/fst/lz4.o [ 12%] Building libs/subcircuit/subcircuit.o [ 13%] Building frontends/aiger/aigerparse.o [ 13%] Building frontends/aiger2/xaiger.o [ 13%] Building frontends/ast/ast.o [ 13%] Building frontends/ast/simplify.o In file included from libs/minisat/Sort.h:24, from libs/minisat/SimpSolver.cc:27: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Size) [with T = Minisat::vec; _Size = int; Size = int]': libs/minisat/Vec.h:125:13: required from 'void Minisat::vec::growTo(Size) [with T = Minisat::vec; _Size = int; Size = int]' 125 | capacity(size); | ~~~~~~~~^~~~~~ libs/minisat/IntMap.h:48:58: required from 'void Minisat::IntMap::reserve(K) [with K = int; V = Minisat::vec; MkIndex = Minisat::MkIndexDefault]' 48 | void reserve(K key) { map.growTo(index(key)+1); } | ~~~~~~~~~~^~~~~~~~~~~~~~ libs/minisat/SolverTypes.h:338:49: required from 'void Minisat::OccLists::init(const K&) [with K = int; Vec = Minisat::vec; Deleted = Minisat::SimpSolver::ClauseDeleted; MkIndex = Minisat::MkIndexDefault]' 338 | void init (const K& idx){ occs.reserve(idx); occs[idx].clear(); dirty.reserve(idx, 0); } | ~~~~~~~~~~~~^~~~~ libs/minisat/SimpSolver.cc:92:26: required from here 92 | occurs .init (v); | ~~~~~~~~~~~~~~~~~^~~ libs/minisat/Vec.h:107:35: warning: 'void* realloc(void*, size_t)' moving an object of non-trivially copyable type 'class Minisat::vec'; use 'new' and 'delete' instead [-Wclass-memaccess] 107 | ((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ libs/minisat/Vec.h:39:7: note: 'class Minisat::vec' declared here 39 | class vec { | ^~~ + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/libs/sha1/sha1.h In file included from libs/minisat/Alg.h:24, from libs/minisat/Solver.cc:29: libs/minisat/Vec.h: In instantiation of 'void Minisat::vec::capacity(Size) [with T = Minisat::vec; _Size = int; Size = int]': libs/minisat/Vec.h:125:13: required from 'void Minisat::vec::growTo(Size) [with T = Minisat::vec; _Size = int; Size = int]' 125 | capacity(size); | ~~~~~~~~^~~~~~ libs/minisat/IntMap.h:48:58: required from 'void Minisat::IntMap::reserve(K) [with K = Minisat::Lit; V = Minisat::vec; MkIndex = Minisat::MkIndexLit]' 48 | void reserve(K key) { map.growTo(index(key)+1); } | ~~~~~~~~~~^~~~~~~~~~~~~~ libs/minisat/SolverTypes.h:338:49: required from 'void Minisat::OccLists::init(const K&) [with K = Minisat::Lit; Vec = Minisat::vec; Deleted = Minisat::Solver::WatcherDeleted; MkIndex = Minisat::MkIndexLit]' 338 | void init (const K& idx){ occs.reserve(idx); occs[idx].clear(); dirty.reserve(idx, 0); } | ~~~~~~~~~~~~^~~~~ libs/minisat/Solver.cc:134:19: required from here 134 | watches .init(mkLit(v, false)); | ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~ libs/minisat/Vec.h:107:35: warning: 'void* realloc(void*, size_t)' moving an object of non-trivially copyable type 'class Minisat::vec'; use 'new' and 'delete' instead [-Wclass-memaccess] 107 | ((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ libs/minisat/Vec.h:39:7: note: 'class Minisat::vec' declared here 39 | class vec { | ^~~ [ 14%] Building frontends/ast/genrtlil.o [ 14%] Building frontends/ast/dpicall.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/log.h [ 14%] Building frontends/ast/ast_binding.o [ 14%] Building frontends/blif/blifparse.o [ 15%] Building frontends/json/jsonparse.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/yosys.h [ 15%] Building frontends/liberty/liberty.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/cost.h [ 15%] Building frontends/rpc/rpc_frontend.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/celltypes.h [ 16%] Building frontends/rtlil/rtlil_frontend.o [ 16%] Building frontends/verific/verific.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/consteval.h [ 16%] Building frontends/verilog/verilog_parser.tab.cc [ 17%] Building frontends/verilog/verilog_error.o [ 17%] Building frontends/verilog/const2ast.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/register.h [ 18%] Building passes/cmds/exec.o [ 18%] Building passes/cmds/add.o [ 18%] Building passes/cmds/delete.o [ 18%] Building passes/cmds/design.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from ./kernel/cost.h:23, from kernel/cost.cc:1: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from kernel/cost.cc:2: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 19%] Building passes/cmds/design_equal.o + g++ -fsyntax-only -std=c++20 -w -E -C -I/home/buildozer/aports/testing/yosys/src -I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -D_YOSYS_ -DYOSYS_ENABLE_PYTHON /home/buildozer/aports/testing/yosys/src/kernel/rtlil.h [ 19%] Building passes/cmds/select.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from frontends/aiger2/xaiger.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 19%] Building passes/cmds/show.o [ 19%] Building passes/cmds/viz.o [ 20%] Building passes/cmds/rename.o [ 20%] Building passes/cmds/autoname.o [ 20%] Building passes/cmds/connect.o kernel/drivertools.cc: In member function 'bool Yosys::DriveChunkMultiple::try_append(const Yosys::DriveBitMultiple&)': kernel/drivertools.cc:263:79: warning: 'constant' may be used uninitialized [-Wmaybe-uninitialized] 263 | single.constant().append(RTLIL::Const(constant)); | ^ kernel/drivertools.cc:252:15: note: 'constant' was declared here 252 | State constant; | ^~~~~~~~ [ 20%] Building passes/cmds/scatter.o [ 21%] Building passes/cmds/setundef.o [ 21%] Building passes/cmds/splitnets.o [ 21%] Building passes/cmds/splitcells.o [ 22%] Building passes/cmds/stat.o [ 22%] Building passes/cmds/internal_stats.o [ 22%] Building passes/cmds/setattr.o [ 22%] Building passes/cmds/copy.o [ 23%] Building passes/cmds/splice.o [ 23%] Building passes/cmds/scc.o [ 23%] Building passes/cmds/glift.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from kernel/rtlil_bufnorm.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'int Yosys::hashlib::dict::do_insert(const K&, const Yosys::hashlib::HasherDJB32::hash_t&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:541:30, inlined from 'std::pair::iterator, bool> Yosys::hashlib::dict::insert(const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:686:16, inlined from 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)' at kernel/rtlil_bufnorm.cc:591:30: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)': ./kernel/hashlib.h:541:67: note: '' declared here 541 | entries.emplace_back(std::pair(key, T()), -1); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'int Yosys::hashlib::dict::do_insert(const K&, const Yosys::hashlib::HasherDJB32::hash_t&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:541:30, inlined from 'std::pair::iterator, bool> Yosys::hashlib::dict::insert(const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:686:16, inlined from 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)' at kernel/rtlil_bufnorm.cc:591:30: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)': ./kernel/hashlib.h:541:67: note: '' declared here 541 | entries.emplace_back(std::pair(key, T()), -1); | ^~~ In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'int Yosys::hashlib::dict::do_insert(const K&, const Yosys::hashlib::HasherDJB32::hash_t&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:544:30, inlined from 'std::pair::iterator, bool> Yosys::hashlib::dict::insert(const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:686:16, inlined from 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)' at kernel/rtlil_bufnorm.cc:591:30: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ ./kernel/hashlib.h: In member function 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)': ./kernel/hashlib.h:544:67: note: '' declared here 544 | entries.emplace_back(std::pair(key, T()), hashtable[hash]); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'int Yosys::hashlib::dict::do_insert(const K&, const Yosys::hashlib::HasherDJB32::hash_t&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:544:30, inlined from 'std::pair::iterator, bool> Yosys::hashlib::dict::insert(const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:686:16, inlined from 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)' at kernel/rtlil_bufnorm.cc:591:30: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'void Yosys::RTLIL::Cell::setPort(Yosys::RTLIL::IdString, Yosys::RTLIL::SigSpec)': ./kernel/hashlib.h:544:67: note: '' declared here 544 | entries.emplace_back(std::pair(key, T()), hashtable[hash]); | ^~~ [ 23%] Building passes/cmds/torder.o [ 24%] Building passes/cmds/logcmd.o [ 24%] Building passes/cmds/tee.o [ 24%] Building passes/cmds/write_file.o [ 24%] Building passes/cmds/connwrappers.o [ 25%] Building passes/cmds/trace.o [ 25%] Building passes/cmds/plugin.o [ 25%] Building passes/cmds/check.o [ 25%] Building passes/cmds/edgetypes.o [ 26%] Building passes/cmds/portlist.o [ 26%] Building passes/cmds/chformal.o [ 26%] Building passes/cmds/chtype.o [ 27%] Building passes/cmds/blackbox.o [ 27%] Building passes/cmds/ltp.o [ 27%] Building passes/cmds/linux_perf.o [ 27%] Building passes/cmds/bugpoint.o [ 28%] Building passes/cmds/scratchpad.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/rtlil.h:23, from ./kernel/satgen.h:23, from kernel/satgen.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/satgen.h:26: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 28%] Building passes/cmds/logger.o [ 28%] Building passes/cmds/printattrs.o [ 28%] Building passes/cmds/sta.o [ 29%] Building passes/cmds/clean_zerowidth.o [ 29%] Building passes/cmds/xprop.o [ 29%] Building passes/cmds/dft_tag.o [ 29%] Building passes/cmds/future.o [ 30%] Building passes/cmds/box_derive.o [ 30%] Building passes/cmds/example_dt.o [ 30%] Building passes/cmds/portarcs.o [ 30%] Building passes/cmds/wrapcell.o [ 31%] Building passes/cmds/setenv.o [ 31%] Building passes/cmds/abstract.o [ 31%] Building passes/cmds/test_select.o [ 32%] Building passes/cmds/timeest.o [ 32%] Building passes/cmds/linecoverage.o [ 32%] Building passes/cmds/sort.o [ 32%] Building passes/cmds/icell_liberty.o [ 33%] Building passes/cmds/sdc/sdc.o [ 33%] Building passes/equiv/equiv_make.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/cmds/scc.cc:24: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::Cell*; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::Cell*; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 33%] Building passes/equiv/equiv_miter.o [ 33%] Building passes/equiv/equiv_simple.o [ 34%] Building passes/equiv/equiv_status.o [ 34%] Building passes/equiv/equiv_add.o [ 34%] Building passes/equiv/equiv_remove.o [ 34%] Building passes/equiv/equiv_induct.o [ 35%] Building passes/equiv/equiv_struct.o [ 35%] Building passes/equiv/equiv_purge.o In file included from ./kernel/yosys.h:42, from passes/cmds/abstract.cc:1: passes/cmds/abstract.cc: In member function 'virtual void {anonymous}::AbstractPass::execute(std::vector >, Yosys::RTLIL::Design*)': ./kernel/log.h:278:77: warning: this statement may fall through [-Wimplicit-fallthrough=] 278 | # define log_assert(_assert_expr_) YOSYS_NAMESPACE_PREFIX log_assert_worker(_assert_expr_, #_assert_expr_, __FILE__, __LINE__) passes/cmds/abstract.cc:471:41: note: in expansion of macro 'log_assert' 471 | log_assert(false); | ^~~~~~~~~~ passes/cmds/abstract.cc:472:33: note: here 472 | case Enable::ActiveLow: | ^~~~ [ 35%] Building passes/equiv/equiv_mark.o [ 35%] Building passes/equiv/equiv_opt.o [ 36%] Building passes/fsm/fsm.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/cmds/wrapcell.cc:19: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 36%] Building passes/fsm/fsm_detect.o [ 36%] Building passes/fsm/fsm_extract.o [ 36%] Building passes/fsm/fsm_opt.o [ 37%] Building passes/fsm/fsm_expand.o [ 37%] Building passes/fsm/fsm_recode.o [ 37%] Building passes/fsm/fsm_info.o [ 38%] Building passes/fsm/fsm_export.o [ 38%] Building passes/fsm/fsm_map.o [ 38%] Building passes/hierarchy/flatten.o [ 38%] Building passes/hierarchy/hierarchy.o [ 39%] Building passes/hierarchy/uniquify.o [ 39%] Building passes/hierarchy/submod.o [ 39%] Building passes/hierarchy/keep_hierarchy.o [ 39%] Building passes/memory/memory.o [ 40%] Building passes/memory/memory_dff.o [ 40%] Building passes/memory/memory_share.o [ 40%] Building passes/memory/memory_collect.o [ 40%] Building passes/memory/memory_unpack.o [ 41%] Building passes/memory/memory_bram.o [ 41%] Building passes/memory/memory_map.o [ 41%] Building passes/memory/memory_memx.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from kernel/rtlil.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 41%] Building passes/memory/memory_nordff.o [ 42%] Building passes/memory/memory_narrow.o [ 42%] Building passes/memory/memory_libmap.o [ 42%] Building passes/memory/memory_bmux2rom.o [ 43%] Building passes/memory/memlib.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from ./kernel/celltypes.h:23, from passes/cmds/dft_tag.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const std::pair&; _U2 = Yosys::RTLIL::SigSpec; _T1 = std::pair; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = std::pair; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops >]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::DftTagWorker::divert_users(Yosys::RTLIL::SigBit, Yosys::RTLIL::SigBit)' at passes/cmds/dft_tag.cc:149:21, inlined from 'Yosys::RTLIL::SigSpec {anonymous}::DftTagWorker::divert_users(Yosys::RTLIL::SigSpec)' at passes/cmds/dft_tag.cc:128:16, inlined from 'void {anonymous}::DftTagWorker::resolve_overwrites()' at passes/cmds/dft_tag.cc:103:56: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'void {anonymous}::DftTagWorker::resolve_overwrites()': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const std::pair&; _U2 = Yosys::RTLIL::SigSpec; _T1 = std::pair; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = std::pair; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops >]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::DftTagWorker::divert_users(Yosys::RTLIL::SigBit, Yosys::RTLIL::SigBit)' at passes/cmds/dft_tag.cc:149:21, inlined from 'Yosys::RTLIL::SigSpec {anonymous}::DftTagWorker::divert_users(Yosys::RTLIL::SigSpec)' at passes/cmds/dft_tag.cc:128:16, inlined from 'void {anonymous}::DftTagWorker::resolve_overwrites()' at passes/cmds/dft_tag.cc:103:56: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'void {anonymous}::DftTagWorker::resolve_overwrites()': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 43%] Building passes/opt/opt.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/log.h:23, from passes/fsm/fsm_opt.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/log.h:475: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 43%] Building passes/opt/opt_merge.o [ 43%] Building passes/opt/opt_mem.o [ 44%] Building passes/opt/opt_mem_feedback.o [ 44%] Building passes/opt/opt_mem_priority.o [ 44%] Building passes/opt/opt_mem_widen.o [ 44%] Building passes/opt/opt_muxtree.o [ 45%] Building passes/opt/opt_reduce.o [ 45%] Building passes/opt/opt_dff.o [ 45%] Building passes/opt/opt_share.o [ 45%] Building passes/opt/opt_expr.o [ 46%] Building passes/opt/opt_hier.o [ 46%] Building passes/opt/share.o [ 46%] Building passes/opt/wreduce.o [ 46%] Building passes/opt/opt_demorgan.o [ 47%] Building passes/opt/rmports.o [ 47%] Building passes/opt/opt_lut.o [ 47%] Building passes/opt/opt_lut_ins.o [ 48%] Building passes/opt/opt_ffinv.o [ 48%] Building passes/opt/pmux2shiftx.o [ 48%] Building passes/opt/muxpack.o [ 48%] Building passes/opt/opt_balance_tree.o [ 48%] Building passes/opt/peepopt_pm.h [ 49%] Building passes/opt/opt_clean/cells_all.o [ 49%] Building passes/opt/opt_clean/cells_temp.o [ 49%] Building passes/opt/opt_clean/wires.o [ 50%] Building passes/opt/opt_clean/inits.o [ 50%] Building passes/opt/opt_clean/opt_clean.o passes/opt/opt_merge.cc: In member function '{anonymous}::FoundDuplicates {anonymous}::OptMergeThreadWorker::find_duplicate_cells(int, const {anonymous}::Shards&) const': passes/opt/opt_merge.cc:330:65: warning: redundant move in initialization [-Wredundant-move] 330 | std::vector bucket = std::move(buckets[index]); | ~~~~~~~~~^~~~~~~~~~~~~~~~ passes/opt/opt_merge.cc:330:65: note: remove 'std::move' call In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/hierarchy/hierarchy.cc:21: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/log.h:23, from passes/fsm/fsm_detect.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/fsm/fsm_detect.cc:23: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43, from ./kernel/log.h:475: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 50%] Building passes/pmgen/test_pmgen_pm.h [ 50%] Building techlibs/ice40/ice40_dsp_pm.h [ 50%] Building techlibs/xilinx/xilinx_srl_pm.h [ 50%] Building passes/proc/proc.o In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Wire* const&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::Wire*; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Wire*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Wire*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Wire* const&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::Wire*; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Wire*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Wire*; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 51%] Building passes/proc/proc_prune.o [ 51%] Building passes/proc/proc_clean.o [ 51%] Building passes/proc/proc_rmdead.o [ 51%] Building passes/proc/proc_init.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/log.h:23, from passes/fsm/fsm_extract.cc:25: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/fsm/fsm_extract.cc:28: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43, from ./kernel/log.h:475: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 52%] Building passes/proc/proc_arst.o [ 52%] Building passes/proc/proc_rom.o [ 52%] Building passes/proc/proc_mux.o [ 53%] Building passes/proc/proc_dlatch.o [ 53%] Building passes/proc/proc_dff.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/opt/opt_hier.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::SigBit; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::SigBit; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 53%] Building passes/proc/proc_memwr.o [ 53%] Building passes/sat/sat.o In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::extract_fsm(Yosys::RTLIL::Wire*)' at passes/fsm/fsm_extract.cc:412:96: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In function 'void {anonymous}::extract_fsm(Yosys::RTLIL::Wire*)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::extract_fsm(Yosys::RTLIL::Wire*)' at passes/fsm/fsm_extract.cc:412:96: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In function 'void {anonymous}::extract_fsm(Yosys::RTLIL::Wire*)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 54%] Building passes/sat/freduce.o [ 54%] Building passes/sat/eval.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/opt/muxpack.cc:21: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = Yosys::RTLIL::SigSpec; _T2 = std::vector]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = std::pair >; _T1 = Yosys::RTLIL::SigBit; _T2 = std::pair >]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair >; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::pair > >,std::pair > >::first.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair >; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = Yosys::RTLIL::SigSpec; _T2 = std::vector]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = std::pair >; _T1 = Yosys::RTLIL::SigBit; _T2 = std::pair >]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair >; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::pair > >,std::pair > >::first.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair >; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 54%] Building passes/sat/sim.o [ 54%] Building passes/sat/miter.o [ 55%] Building passes/sat/expose.o [ 55%] Building passes/sat/assertpmux.o [ 55%] Building passes/sat/clk2fflogic.o [ 55%] Building passes/sat/async2sync.o [ 56%] Building passes/sat/formalff.o [ 56%] Building passes/sat/supercover.o [ 56%] Building passes/sat/fmcombine.o [ 56%] Building passes/sat/mutate.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/opt/opt_merge.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 57%] Building passes/sat/cutpoint.o [ 57%] Building passes/sat/fminit.o [ 57%] Building passes/sat/recover_names.o [ 57%] Building passes/sat/qbfsat.o [ 58%] Building passes/sat/synthprop.o In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from kernel/rtlil.cc:21: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 58%] Building passes/techmap/techmap.o [ 58%] Building passes/techmap/simplemap.o [ 59%] Building passes/techmap/dfflibmap.o [ 59%] Building passes/techmap/maccmap.o [ 59%] Building passes/techmap/booth.o [ 59%] Building passes/techmap/libparse.o [ 60%] Building passes/techmap/libcache.o [ 60%] Building passes/techmap/abc.o In file included from ./kernel/yosys_common.h:36, from ./kernel/rtlil.h:23, from ./passes/opt/opt_clean/opt_clean.h:20, from passes/opt/opt_clean/wires.cc:20: In function 'constexpr std::__optional_ne_t<_Tp, _Up> std::operator!=(const optional<_Tp>&, const optional<_Up>&) [with _Tp = __gnu_cxx::__normal_iterator >; _Up = __gnu_cxx::__normal_iterator >]', inlined from 'bool Yosys::ShardedVector::iterator::operator!=(const Yosys::ShardedVector::iterator&) const [with T = Yosys::RTLIL::Wire*]' at ./kernel/threading.h:374:52, inlined from 'void Yosys::hashlib::pool::insert(InputIterator, InputIterator) [with InputIterator = Yosys::ShardedVector::iterator; K = Yosys::RTLIL::Wire*; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:1126:16, inlined from '{anonymous}::WireDeleter::WireDeleter({anonymous}::UsedSignals&, bool, const Yosys::AnalysisContext&)' at passes/opt/opt_clean/wires.cc:503:25, inlined from 'bool Yosys::rmunused_module_signals(RTLIL::Module*, ParallelDispatchThreadPool::Subpool&, CleanRunContext&)' at passes/opt/opt_clean/wires.cc:566:55: /usr/include/c++/15.2.0/optional:1469:38: warning: '*(__gnu_cxx::__normal_iterator > >*)((char*)&first + offsetof(Yosys::ShardedVector::iterator, Yosys::ShardedVector::iterator::inner_it.std::optional<__gnu_cxx::__normal_iterator > > >::.std::_Optional_base<__gnu_cxx::__normal_iterator > >, true, true>::_M_payload.std::_Optional_payload<__gnu_cxx::__normal_iterator > >, true, true, true>::.std::_Optional_payload_base<__gnu_cxx::__normal_iterator > > >::_M_payload)).__gnu_cxx::__normal_iterator >::_M_current' may be used uninitialized [-Wmaybe-uninitialized] 1469 | || (static_cast(__lhs) && *__lhs != *__rhs); | ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ passes/opt/opt_clean/wires.cc: In function 'bool Yosys::rmunused_module_signals(RTLIL::Module*, ParallelDispatchThreadPool::Subpool&, CleanRunContext&)': passes/opt/opt_clean/wires.cc:536:6: note: '*(__gnu_cxx::__normal_iterator > >*)((char*)&first + offsetof(Yosys::ShardedVector::iterator, Yosys::ShardedVector::iterator::inner_it.std::optional<__gnu_cxx::__normal_iterator > > >::.std::_Optional_base<__gnu_cxx::__normal_iterator > >, true, true>::_M_payload.std::_Optional_payload<__gnu_cxx::__normal_iterator > >, true, true, true>::.std::_Optional_payload_base<__gnu_cxx::__normal_iterator > > >::_M_payload)).__gnu_cxx::__normal_iterator >::_M_current' was declared here 536 | bool rmunused_module_signals(RTLIL::Module *module, ParallelDispatchThreadPool::Subpool &subpool, CleanRunContext &clean_ctx) | ^~~~~~~~~~~~~~~~~~~~~~~ [ 60%] Building passes/techmap/abc9.o [ 60%] Building passes/techmap/abc9_exe.o [ 61%] Building passes/techmap/abc9_ops.o [ 61%] Building passes/techmap/abc_new.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/sat/fminit.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:117:30, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/sat/fminit.cc:164:31: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ passes/sat/fminit.cc: In member function 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/sat/fminit.cc:164:75: note: '' declared here 164 | ctrlsig_latched.push_back(SigSpec()); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:117:30, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/sat/fminit.cc:164:31: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ passes/sat/fminit.cc: In member function 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/sat/fminit.cc:164:75: note: '' declared here 164 | ctrlsig_latched.push_back(SigSpec()); | ^ In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/sat/fminit.cc:164:31: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ passes/sat/fminit.cc: In member function 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/sat/fminit.cc:164:75: note: '' declared here 164 | ctrlsig_latched.push_back(SigSpec()); | ^ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::RTLIL::SigSpec; _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::RTLIL::SigSpec}; _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::RTLIL::SigSpec; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/sat/fminit.cc:164:31: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ passes/sat/fminit.cc: In member function 'virtual void {anonymous}::FminitPass::execute(std::vector >, Yosys::RTLIL::Design*)': passes/sat/fminit.cc:164:75: note: '' declared here 164 | ctrlsig_latched.push_back(SigSpec()); | ^ In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/proc/proc_dff.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/proc/proc_dff.cc:22: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 61%] Building passes/techmap/iopadmap.o [ 61%] Building passes/techmap/clkbufmap.o [ 62%] Building passes/techmap/hilomap.o [ 62%] Building passes/techmap/extract.o [ 62%] Building passes/techmap/extract_fa.o [ 62%] Building passes/techmap/extract_counter.o [ 63%] Building passes/techmap/extract_reduce.o [ 63%] Building passes/techmap/alumacc.o [ 63%] Building passes/techmap/dffinit.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/opt/share.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/satgen.h:26, from ./kernel/qcsat.h:23, from passes/opt/share.cc:21: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 64%] Building passes/techmap/pmuxtree.o [ 64%] Building passes/techmap/bmuxmap.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/techmap/dfflibmap.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 64%] Building passes/techmap/demuxmap.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/techmap/maccmap.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from passes/techmap/maccmap.cc:21: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 64%] Building passes/techmap/bwmuxmap.o [ 65%] Building passes/techmap/muxcover.o [ 65%] Building passes/techmap/aigmap.o [ 65%] Building passes/techmap/tribuf.o [ 65%] Building passes/techmap/lut2mux.o [ 66%] Building passes/techmap/lut2bmux.o [ 66%] Building passes/techmap/nlutmap.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/sat/eval.cc:23: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/sat/eval.cc:25: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 66%] Building passes/techmap/shregmap.o [ 66%] Building passes/techmap/deminout.o [ 67%] Building passes/techmap/insbuf.o [ 67%] Building passes/techmap/bufnorm.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from ./kernel/sigtools.h:23, from passes/techmap/booth.cc:58: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from passes/techmap/booth.cc:60: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 67%] Building passes/techmap/attrmvcp.o [ 67%] Building passes/techmap/attrmap.o [ 68%] Building passes/techmap/zinit.o [ 68%] Building passes/techmap/dfflegalize.o [ 68%] Building passes/techmap/dffunmap.o [ 69%] Building passes/techmap/flowmap.o [ 69%] Building passes/techmap/extractinv.o [ 69%] Building passes/techmap/cellmatch.o [ 69%] Building passes/techmap/clockgate.o [ 70%] Building passes/techmap/constmap.o [ 70%] Building passes/techmap/arith_tree.o [ 70%] Building passes/tests/test_autotb.o [ 70%] Building passes/tests/test_cell.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/sat/qbfsat.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/sat/qbfsat.cc:22: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 71%] Building passes/tests/test_abcloop.o [ 71%] Building passes/tests/raise_error.o [ 71%] Building backends/aiger/aiger.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/techmap/iopadmap.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = Yosys::RTLIL::SigSpec; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = std::pair; _T2 = int]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = std::pair, int>; _T1 = Yosys::RTLIL::SigBit; _T2 = std::pair, int>]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair, int>; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'virtual void {anonymous}::IopadmapPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/techmap/iopadmap.cc:269:22: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::pair, int>,std::pair, int>::first.std::pair::first.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'virtual void {anonymous}::IopadmapPass::execute(std::vector >, Yosys::RTLIL::Design*)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = Yosys::RTLIL::SigSpec; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'std::pair<_T1, _T2>::pair(std::pair<_T1, _T2>&&) [with _T1 = std::pair; _T2 = int]' at /usr/include/c++/15.2.0/bits/stl_pair.h:313:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::SigBit&; _U2 = std::pair, int>; _T1 = Yosys::RTLIL::SigBit; _T2 = std::pair, int>]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::SigBit; T = std::pair, int>; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'virtual void {anonymous}::IopadmapPass::execute(std::vector >, Yosys::RTLIL::Design*)' at passes/techmap/iopadmap.cc:269:22: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::pair, int>,std::pair, int>::first.std::pair::first.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'virtual void {anonymous}::IopadmapPass::execute(std::vector >, Yosys::RTLIL::Design*)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 71%] Building backends/aiger/xaiger.o [ 72%] Building backends/aiger2/aiger.o [ 72%] Building backends/blif/blif.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/sat/recover_names.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/sat/recover_names.cc:22: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 72%] Building backends/btor/btor.o [ 72%] Building backends/cxxrtl/cxxrtl_backend.o [ 73%] Building backends/edif/edif.o [ 73%] Building backends/firrtl/firrtl.o [ 73%] Building backends/functional/cxx.o [ 73%] Building backends/functional/smtlib.o [ 74%] Building backends/functional/smtlib_rosette.o [ 74%] Building backends/functional/test_generic.o [ 74%] Building backends/intersynth/intersynth.o [ 75%] Building backends/jny/jny.o [ 75%] Building backends/json/json.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/techmap/extract_fa.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/techmap/extract_fa.cc:22: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 75%] Building backends/rtlil/rtlil_backend.o [ 75%] Building backends/simplec/simplec.o [ 76%] Building backends/smt2/smt2.o [ 76%] Building backends/smv/smv.o [ 76%] Building backends/spice/spice.o [ 76%] Building backends/table/table.o [ 77%] Building backends/verilog/verilog_backend.o [ 77%] Building techlibs/achronix/synth_achronix.o [ 77%] Building techlibs/analogdevices/synth_analogdevices.o [ 77%] Building techlibs/anlogic/synth_anlogic.o [ 78%] Building techlibs/anlogic/anlogic_eqn.o [ 78%] Building techlibs/anlogic/anlogic_fixcarry.o [ 78%] Building techlibs/common/synth.o [ 78%] Building techlibs/common/prep.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from ./kernel/celltypes.h:23, from passes/techmap/cellmatch.cc:1: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/techmap/cellmatch.cc:5: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 79%] Building techlibs/common/opensta.o [ 79%] Building techlibs/common/sdc_expand.o [ 79%] Building techlibs/coolrunner2/synth_coolrunner2.o [ 80%] Building techlibs/coolrunner2/coolrunner2_sop.o [ 80%] Building techlibs/coolrunner2/coolrunner2_fixup.o [ 80%] Building techlibs/easic/synth_easic.o [ 80%] Building techlibs/efinix/synth_efinix.o [ 81%] Building techlibs/efinix/efinix_fixcarry.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/techmap/flowmap.cc:98: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/consteval.h:26, from passes/techmap/flowmap.cc:101: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 81%] Building techlibs/fabulous/synth_fabulous.o [ 81%] Building techlibs/gatemate/synth_gatemate.o [ 81%] Building techlibs/gatemate/gatemate_foldinv.o In file included from ./kernel/yosys.h:43, from techlibs/anlogic/anlogic_fixcarry.cc:20: In member function 'int Yosys::RTLIL::SigSpec::size() const', inlined from 'int Yosys::GetSize(const T&) [with T = RTLIL::SigSpec]' at ./kernel/yosys_common.h:267:65, inlined from 'void {anonymous}::fix_carry_chain(Yosys::RTLIL::Module*)' at techlibs/anlogic/anlogic_fixcarry.cc:49:16: ./kernel/rtlil.h:1610:86: warning: 'o.Yosys::RTLIL::SigSpec::.Yosys::RTLIL::SigSpec::::chunk_.Yosys::RTLIL::SigChunk::width' may be used uninitialized [-Wmaybe-uninitialized] 1610 | inline int size() const { return rep_ == CHUNK ? chunk_.width : GetSize(bits_); } | ^ techlibs/anlogic/anlogic_fixcarry.cc: In function 'void {anonymous}::fix_carry_chain(Yosys::RTLIL::Module*)': techlibs/anlogic/anlogic_fixcarry.cc:48:41: note: 'o' declared here 48 | SigSpec o = cell->getPort(ID(o)); | ^ [ 82%] Building techlibs/gowin/synth_gowin.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/techmap/abc.cc:44: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 7; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'constexpr std::_Tuple_impl<_Idx, _Head>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head>&&) [with unsigned int _Idx = 7; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:586:41, inlined from 'constexpr std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 6; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 4; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<4, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<5, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<6, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<7, Yosys::RTLIL::SigSpec>::.std::_Head_base<7, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 7; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'constexpr std::_Tuple_impl<_Idx, _Head>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head>&&) [with unsigned int _Idx = 7; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:586:41, inlined from 'constexpr std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 6; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 4; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<4, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<5, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<6, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<7, Yosys::RTLIL::SigSpec>::.std::_Head_base<7, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 4; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<4, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<5, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<5, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 5; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 4; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<4, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<5, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<5, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<3, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 3; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 2; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<2, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<3, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<3, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<1, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'std::_Head_base<_Idx, _Head, false>::_Head_base(std::_Head_base<_Idx, _Head, false>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/tuple:209:17, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 1; _Head = Yosys::RTLIL::SigSpec; _Tail = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::_Tuple_impl<_Idx, _Head, _Tail ...>::_Tuple_impl(std::_Tuple_impl<_Idx, _Head, _Tail ...>&&) [with unsigned int _Idx = 0; _Head = bool; _Tail = {Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:324:7, inlined from 'std::tuple< >::tuple(std::tuple< >&&) [with _Elements = {bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec}]' at /usr/include/c++/15.2.0/tuple:996:17, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = Yosys::RTLIL::Cell* const&; _U2 = std::tuple; _T1 = Yosys::RTLIL::Cell*; _T2 = std::tuple]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(std::tuple,std::tuple::.std::_Tuple_impl<0, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Tuple_impl<1, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec, bool, Yosys::RTLIL::SigSpec>::.std::_Head_base<1, Yosys::RTLIL::SigSpec, false>::_M_head_impl.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::Cell*; T = std::tuple; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 82%] Building techlibs/greenpak4/synth_greenpak4.o [ 82%] Building techlibs/greenpak4/greenpak4_dffinv.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/register.h:23, from passes/techmap/abc9_ops.cc:21: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::prep_xaiger(Yosys::RTLIL::Module*, bool)' at passes/techmap/abc9_ops.cc:904:53: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In function 'void {anonymous}::prep_xaiger(Yosys::RTLIL::Module*, bool)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/register.h:24: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from 'void {anonymous}::prep_xaiger(Yosys::RTLIL::Module*, bool)' at passes/techmap/abc9_ops.cc:904:53: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In function 'void {anonymous}::prep_xaiger(Yosys::RTLIL::Module*, bool)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ [ 82%] Building techlibs/ice40/synth_ice40.o [ 83%] Building techlibs/ice40/ice40_braminit.o [ 83%] Building techlibs/ice40/ice40_opt.o [ 83%] Building techlibs/ice40/ice40_dsp.o [ 83%] Building techlibs/ice40/ice40_wrapcarry_pm.h In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/yosys.h:40, from passes/tests/test_cell.cc:21: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/satgen.h:26, from passes/tests/test_cell.cc:22: ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ In file included from ./kernel/yosys.h:43: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'Yosys::Macc::term_t::term_t(Yosys::Macc::term_t&&)' at ./kernel/macc.h:29:9, inlined from 'constexpr _Tp* std::construct_at(_Tp*, _Args&& ...) [with _Tp = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}]' at /usr/include/c++/15.2.0/bits/stl_construct.h:110:9, inlined from 'static constexpr void std::allocator_traits >::construct(allocator_type&, _Up*, _Args&& ...) [with _Up = Yosys::Macc::term_t; _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t]' at /usr/include/c++/15.2.0/bits/alloc_traits.h:676:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::_M_realloc_append(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:586:26, inlined from 'constexpr std::vector<_Tp, _Alloc>::reference std::vector<_Tp, _Alloc>::emplace_back(_Args&& ...) [with _Args = {Yosys::Macc::term_t}; _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/vector.tcc:123:21, inlined from 'constexpr void std::vector<_Tp, _Alloc>::push_back(value_type&&) [with _Tp = Yosys::Macc::term_t; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:1434:21, inlined from 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)' at ./kernel/macc.h:133:19: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::Macc::term_t, Yosys::Macc::term_t::in_b.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/macc.h: In member function 'void Yosys::Macc::from_cell_v1(Yosys::RTLIL::Cell*)': ./kernel/macc.h:133:71: note: '' declared here 133 | terms.push_back(term_t{{bit}, {}, false, false}); | ^ [ 84%] Building techlibs/intel/synth_intel.o [ 84%] Building techlibs/intel_alm/synth_intel_alm.o [ 84%] Building techlibs/lattice/synth_lattice.o [ 85%] Building techlibs/lattice/lattice_gsr.o [ 85%] Building techlibs/lattice/lattice_dsp_nexus_pm.h [ 85%] Building techlibs/microchip/synth_microchip.o [ 85%] Building techlibs/microchip/microchip_dffopt.o [ 85%] Building techlibs/microchip/microchip_dsp_pm.h [ 85%] Building techlibs/microchip/microchip_dsp_CREG_pm.h [ 85%] Building techlibs/microchip/microchip_dsp_cascade_pm.h [ 86%] Building techlibs/nanoxplore/synth_nanoxplore.o [ 86%] Building techlibs/nanoxplore/nx_carry.o [ 86%] Building techlibs/quicklogic/synth_quicklogic.o [ 87%] Building techlibs/quicklogic/ql_bram_merge.o In file included from ./kernel/yosys.h:43, from techlibs/gatemate/gatemate_foldinv.cc:21: In member function 'int Yosys::RTLIL::SigSpec::size() const', inlined from 'int Yosys::GetSize(const T&) [with T = RTLIL::SigSpec]' at ./kernel/yosys_common.h:267:65, inlined from 'void {anonymous}::FoldInvWorker::fold_input_inverters()' at techlibs/gatemate/gatemate_foldinv.cc:109:28: ./kernel/rtlil.h:1610:86: warning: 'sig.Yosys::RTLIL::SigSpec::.Yosys::RTLIL::SigSpec::::chunk_.Yosys::RTLIL::SigChunk::width' may be used uninitialized [-Wmaybe-uninitialized] 1610 | inline int size() const { return rep_ == CHUNK ? chunk_.width : GetSize(bits_); } | ^ techlibs/gatemate/gatemate_foldinv.cc: In member function 'void {anonymous}::FoldInvWorker::fold_input_inverters()': techlibs/gatemate/gatemate_foldinv.cc:108:22: note: 'sig' declared here 108 | auto sig = cell->getPort(ipin.first); | ^~~ [ 87%] Building techlibs/quicklogic/ql_bram_types.o [ 87%] Building techlibs/quicklogic/ql_dsp_simd.o [ 87%] Building techlibs/quicklogic/ql_dsp_io_regs.o [ 88%] Building techlibs/quicklogic/ql_ioff.o [ 88%] Building techlibs/quicklogic/ql_dsp_macc_pm.h [ 88%] Building techlibs/sf2/synth_sf2.o [ 88%] Building techlibs/xilinx/synth_xilinx.o [ 89%] Building techlibs/xilinx/xilinx_dffopt.o [ 89%] Building techlibs/xilinx/xilinx_dsp_pm.h [ 89%] Building techlibs/xilinx/xilinx_dsp48a_pm.h [ 89%] Building techlibs/xilinx/xilinx_dsp_CREG_pm.h In member function 'int Yosys::RTLIL::SigSpec::size() const', inlined from 'int Yosys::GetSize(const T&) [with T = RTLIL::SigSpec]' at ./kernel/yosys_common.h:267:65, inlined from 'void {anonymous}::FoldInvWorker::fold_output_inverters()' at techlibs/gatemate/gatemate_foldinv.cc:147:24: ./kernel/rtlil.h:1610:86: warning: 'o_sig.Yosys::RTLIL::SigSpec::.Yosys::RTLIL::SigSpec::::chunk_.Yosys::RTLIL::SigChunk::width' may be used uninitialized [-Wmaybe-uninitialized] 1610 | inline int size() const { return rep_ == CHUNK ? chunk_.width : GetSize(bits_); } | ^ techlibs/gatemate/gatemate_foldinv.cc: In member function 'void {anonymous}::FoldInvWorker::fold_output_inverters()': techlibs/gatemate/gatemate_foldinv.cc:146:18: note: 'o_sig' declared here 146 | auto o_sig = cell->getPort(ID::O); | ^~~~~ [ 89%] Building techlibs/xilinx/xilinx_dsp_cascade_pm.h [ 89%] Building techlibs/xilinx/xilinx_srl.o [ 99%] Building yosys-config [ 99%] Building passes/techmap/filterlib.o [ 99%] Building yosys-smtbmc [ 99%] Building yosys-witness [ 99%] Building share/include/kernel/binding.h [ 99%] Building share/include/kernel/bitpattern.h [ 99%] Building share/include/kernel/cellaigs.h [ 99%] Building share/include/kernel/celledges.h [ 99%] Building share/include/kernel/celltypes.h [ 99%] Building share/include/kernel/newcelltypes.h [ 99%] Building share/include/kernel/consteval.h [ 99%] Building share/include/kernel/constids.inc [ 99%] Building share/include/kernel/cost.h [ 99%] Building share/include/kernel/drivertools.h [ 99%] Building share/include/kernel/ff.h [ 99%] Building share/include/kernel/ffinit.h [ 99%] Building share/include/kernel/ffmerge.h [ 99%] Building share/include/kernel/fmt.h [ 99%] Building share/include/kernel/fstdata.h [ 99%] Building share/include/kernel/gzip.h [ 99%] Building share/include/kernel/hashlib.h [ 99%] Building share/include/kernel/io.h [ 99%] Building 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frontends/verilog/verilog_frontend.o [ 99%] Building passes/opt/peepopt.o [ 99%] Building passes/pmgen/test_pmgen.o [ 99%] Building techlibs/ice40/ice40_wrapcarry.o [ 99%] Building techlibs/lattice/lattice_dsp_nexus.o [ 99%] Building techlibs/microchip/microchip_dsp.o [ 99%] Building techlibs/quicklogic/ql_dsp_macc.o [ 99%] Building techlibs/xilinx/xilinx_dsp.o [ 99%] Building share/gatemate/lut_tree_cells.genlib [ 99%] Building share/gatemate/lut_tree_map.v [ 99%] Building share/quicklogic/qlf_k6n10f/bram_types_sim.v [ 99%] Building frontends/verilog/verilog_lexer.o In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/log.h:23, from techlibs/quicklogic/ql_dsp_simd.cc:19: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from '{anonymous}::QlDspSimdPass::DspConfig {anonymous}::QlDspSimdPass::getDspConfig(Yosys::RTLIL::Cell*, const std::vector >&)' at techlibs/quicklogic/ql_dsp_simd.cc:269:27: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In function '{anonymous}::QlDspSimdPass::DspConfig {anonymous}::QlDspSimdPass::getDspConfig(Yosys::RTLIL::Cell*, const std::vector >&)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from ./kernel/yosys.h:43, from ./kernel/log.h:475: In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::IdString&; _U2 = Yosys::RTLIL::SigSpec; _T1 = Yosys::RTLIL::IdString; _T2 = Yosys::RTLIL::SigSpec]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = Yosys::RTLIL::IdString; T = Yosys::RTLIL::SigSpec; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23, inlined from '{anonymous}::QlDspSimdPass::DspConfig {anonymous}::QlDspSimdPass::getDspConfig(Yosys::RTLIL::Cell*, const std::vector >&)' at techlibs/quicklogic/ql_dsp_simd.cc:269:27: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(Yosys::RTLIL::SigSpec, Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In function '{anonymous}::QlDspSimdPass::DspConfig {anonymous}::QlDspSimdPass::getDspConfig(Yosys::RTLIL::Cell*, const std::vector >&)': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In file included from /usr/include/c++/15.2.0/vector:68, from ./kernel/yosys_common.h:28, from ./kernel/rtlil.h:23, from backends/cxxrtl/cxxrtl_backend.cc:20: In constructor 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data::_Vector_impl_data(std::_Vector_base<_Tp, _Alloc>::_Vector_impl_data&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]', inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_impl::_Vector_impl(std::_Vector_base<_Tp, _Alloc>::_Vector_impl&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:161:68, inlined from 'constexpr std::_Vector_base<_Tp, _Alloc>::_Vector_base(std::_Vector_base<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:344:7, inlined from 'constexpr std::vector<_Tp, _Alloc>::vector(std::vector<_Tp, _Alloc>&&) [with _Tp = Yosys::RTLIL::State; _Alloc = std::allocator]' at /usr/include/c++/15.2.0/bits/stl_vector.h:650:7, inlined from 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)' at ./kernel/rtlil.h:1295:15, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from '{anonymous}::WireType::WireType({anonymous}::WireType&&)' at backends/cxxrtl/cxxrtl_backend.cc:649:8, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::Wire* const&; _U2 = {anonymous}::WireType; _T1 = const Yosys::RTLIL::Wire*; _T2 = {anonymous}::WireType]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = const Yosys::RTLIL::Wire*; T = {anonymous}::WireType; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: /usr/include/c++/15.2.0/bits/stl_vector.h:113:33: warning: '*(std::_Vector_base >::_Vector_impl_data*)((char*)& + offsetof(::WireType, ::WireType::sig_subst.Yosys::RTLIL::SigSpec::) + 4).std::_Vector_base >::_Vector_impl_data::_M_end_of_storage' may be used uninitialized [-Wmaybe-uninitialized] 113 | _M_end_of_storage(__x._M_end_of_storage) | ~~~~^~~~~~~~~~~~~~~~~ In file included from ./kernel/yosys_common.h:158: ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = const Yosys::RTLIL::Wire*; T = {anonymous}::WireType; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ In constructor 'constexpr Yosys::RTLIL::SigChunk::SigChunk(Yosys::RTLIL::SigChunk&&)', inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1479:57, inlined from 'Yosys::RTLIL::SigSpec::SigSpec(Yosys::RTLIL::SigSpec&&)' at ./kernel/rtlil.h:1477:2, inlined from '{anonymous}::WireType::WireType({anonymous}::WireType&&)' at backends/cxxrtl/cxxrtl_backend.cc:649:8, inlined from 'constexpr std::pair<_T1, _T2>::pair(_U1&&, _U2&&) [with _U1 = const Yosys::RTLIL::Wire* const&; _U2 = {anonymous}::WireType; _T1 = const Yosys::RTLIL::Wire*; _T2 = {anonymous}::WireType]' at /usr/include/c++/15.2.0/bits/stl_pair.h:464:35, inlined from 'T& Yosys::hashlib::dict::operator[](const K&) [with K = const Yosys::RTLIL::Wire*; T = {anonymous}::WireType; OPS = Yosys::hashlib::hash_ops]' at ./kernel/hashlib.h:828:23: ./kernel/rtlil.h:1295:15: warning: '((__vector(2) int*)((char*)& + offsetof(::WireType, ::WireType::sig_subst.Yosys::RTLIL::SigSpec::)))[2]' may be used uninitialized [-Wmaybe-uninitialized] 1295 | struct RTLIL::SigChunk | ^~~~~~~~ ./kernel/hashlib.h: In member function 'T& Yosys::hashlib::dict::operator[](const K&) [with K = const Yosys::RTLIL::Wire*; T = {anonymous}::WireType; OPS = Yosys::hashlib::hash_ops]': ./kernel/hashlib.h:828:60: note: '' declared here 828 | i = do_insert(std::pair(key, T()), hash); | ^~~ /home/buildozer/aports/testing/yosys/src/pyosys/wrappers_tpl.cc: In function 'void pyosys::pybind11_init_libyosys(pybind11::module_&)': /home/buildozer/aports/testing/yosys/src/pyosys/wrappers_tpl.cc:562:90: warning: 'bool Yosys::RTLIL::IdString::in(const Yosys::hashlib::pool&) const' is deprecated [-Wdeprecated-declarations] In file included from ./kernel/binding.h:23, from /home/buildozer/aports/testing/yosys/src/pyosys/wrappers_tpl.cc:21: ./kernel/rtlil.h:676:13: note: declared here 676 | inline bool RTLIL::IdString::in(const pool &rhs) const { return rhs.count(*this) != 0; } | ^~~~~ [ 99%] Building yosys-filterlib kernel/register.cc: In constructor 'Yosys::CellHelpMessages::CellHelpMessages()': kernel/register.cc:743:9: note: variable tracking size limit exceeded with '-fvar-tracking-assignments', retrying without 743 | CellHelpMessages() { | ^~~~~~~~~~~~~~~~ [100%] Building yosys [100%] Building libyosys.so Build successful. [Makefile.conf] CONFIG:=gcc [Makefile.conf] PREFIX:=/usr [Makefile.conf] ABCEXTERNAL:=/usr/bin/abc [Makefile.conf] ENABLE_ABC:=1 [Makefile.conf] ENABLE_LIBYOSYS:=1 [Makefile.conf] ENABLE_NDEBUG:=1 [Makefile.conf] ENABLE_PROTOBUF:=1 [Makefile.conf] ENABLE_PYOSYS:=1 [Makefile.conf] PYOSYS_USE_UV:=0 make[1]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests' make[1]: Entering directory '/home/buildozer/aports/testing/yosys/src' mkdir -p /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/ /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/opt/ /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/techmap/ mkdir -p /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/ /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/opt/ /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/techmap/ g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/sigspecExtractTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/sigspecExtractTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/ioTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/ioTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/rtlilTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/rtlilTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/rtlilStringTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/rtlilStringTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/sigspecRemove2Test.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/sigspecRemove2Test.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/bitpatternTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/bitpatternTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/cellTypesTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/cellTypesTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/logTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/logTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/hashTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/hashTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/threadingTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/threadingTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/modindexTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//kernel/modindexTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/opt/optDffFindComplementaryPatternTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//opt/optDffFindComplementaryPatternTest.cc g++ -o /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/techmap/libparseTest.o -c -I/home/buildozer/aports/testing/yosys/src -Os -fstack-clash-protection -Wformat -Werror=format-security -D_GLIBCXX_ASSERTIONS=1 -D_LIBCPP_ENABLE_THREAD_SAFETY_ANNOTATIONS=1 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_FAST -Wall -Wextra -Werror=unused -ggdb -I. -I./ -MD -MP -D_YOSYS_ -fPIC -I/usr/include -DYOSYS_VER=\0.66\ -DYOSYS_MAJOR=0 -DYOSYS_MINOR=66 -DYOSYS_COMMIT=0.66 -std=c++20 -O3 -I-I/usr/include/python3.14 -I/usr/lib/python3.14/site-packages/pybind11/include -DYOSYS_ENABLE_PYTHON -I/usr/include/python3.14 -I/usr/include/python3.14 -DYOSYS_ENABLE_PYTHON -DYOSYS_ENABLE_READLINE -DYOSYS_ENABLE_PLUGINS -DYOSYS_ENABLE_GLOB -DYOSYS_ENABLE_ZLIB -DYOSYS_ENABLE_TCL -DYOSYS_ENABLE_THREADS -DYOSYS_ENABLE_ABC /home/buildozer/aports/testing/yosys/src/tests/unit//techmap/libparseTest.cc make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/analogdevices' make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/ice40' make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/machxo2' opt_share PRNG seed: 423820439 make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/nanoxplore' fsm PRNG seed: 218532852 make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/microchip' make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/nexus' xprop PRNG seed: 642669222 share PRNG seed: 1087222674 bram PRNG seed: 189398 Generate FST for sim models Test tb_sdff Test tb_dffe Test tb_adlatch Test tb_adff Test tb_dlatchsr Test tb_sdffe Test tb_adffe Test tb_aldffe Test tb_sdffce Test tb_aldff Test tb_dlatch Test tb_dffsr Test tb_dff realmath PRNG seed: 451441135 PASS counter.ys PASS add_sub.ys PASS bug1462.ys PASS add_sub.ys PASS logic.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/quicklogic/pp3' PASS shifter.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/quicklogic/qlf_k6n10f' PASS dffs.ys PASS fsm.ys PASS bug1460.ys PASS add_sub.ys PASS bug1626.ys PASS bug1480.ys PASS adffs.ys PASS bug2061.ys PASS add_sub.ys PASS counter.ys PASS bug1598.ys PASS bug1597.ys PASS counter.ys PASS adffs.ys PASS bug1598.ys PASS adffs.ys PASS mux.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/xilinx' PASS counter.ys PASS dffs.ys PASS asym_ram_sdp.ys PASS fsm.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/logTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/logTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS add_sub.ys PASS dffs.ys PASS logic.ys PASS latches.ys PASS fsm.ys PASS logic.ys PASS dsp_abc9.ys PASS mul.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/hashTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/hashTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS tribuf.ys PASS dffs.ys PASS mux.ys PASS tribuf.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/quicklogic/pp3' ...passed tests in ./arch/quicklogic/pp3 PASS counter.ys PASS counter.ys PASS opt_lut_ins.ys PASS mul_unsigned.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/techmap/libparseTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/techmap/libparseTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS lutram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/machxo2' ...passed tests in ./arch/machxo2 g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/sigspecExtractTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/sigspecExtractTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/bind' PASS basic.ys PASS cell_list.ys PASS hier.ys PASS inst_list.ys PASS param.ys PASS toplevel.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/bind' ...passed tests in ./bind PASS ice40_dsp.ys PASS fsm.ys PASS adffs.ys PASS mux.ys PASS shifter.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/ioTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/ioTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/bugpoint' PASS fsm.ys PASS failures.ys PASS logic.ys PASS dff_opt.ys PASS reduce.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/opt' PASS alumacc.ys PASS bug1525.ys PASS bug1758.ys PASS bug1854.ys PASS bug2010.ys PASS ice40_dsp_const.ys PASS bug2311.ys PASS bug2221.ys PASS bug2318.ys PASS bug2623.ys PASS bug2765.ys PASS bug2766.ys PASS bug2824.ys PASS bug2920.ys PASS bug3047.ys PASS dffs.ys PASS bug3117.ys PASS bug3867.ys PASS bug3848.ys PASS ice40_wrapcarry.ys PASS bug4413.ys PASS bug4610.ys PASS bug5164.ys PASS bug5398.ys PASS memory_bmux2rom.ys PASS memory_dff_trans.ys PASS proc_constraints.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/rtlilStringTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/rtlilStringTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS memory_map_offset.ys PASS attributes_test.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/sat' PASS asserts.ys PASS asserts_seq.ys PASS bug2595.ys PASS opt_balance_tree.ys PASS opt_clean_init.ys PASS opt_clean_init_const.ys PASS opt_clean_mem.ys PASS ice40_opt.ys PASS opt_clean_standalone_wires.ys PASS opt_dff-simplify.ys PASS opt_dff_arst.ys PASS opt_dff_clk.ys PASS opt_dff_const.ys PASS opt_dff_dffmux.ys PASS mod_constraints.ys PASS opt_dff_en.ys PASS opt_dff_qd.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/sdc' PASS alu_sub.ys PASS fsm.ys PASS side-effects.sh PASS unknown-getter.sh make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/sdc' ...passed tests in ./sdc g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/sigspecRemove2Test /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/sigspecRemove2Test.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS opt_dff_mux.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/bitpatternTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/bitpatternTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/cellTypesTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/cellTypesTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS uram_ar.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/threadingTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/threadingTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS raise_error.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/bugpoint' ...passed tests in ./bugpoint g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/modindexTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/modindexTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS counters-repeat.ys g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/opt/optDffFindComplementaryPatternTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/opt/optDffFindComplementaryPatternTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread g++ -L/home/buildozer/aports/testing/yosys/src -Wl,-rpath=/home/buildozer/aports/testing/yosys/src -rdynamic -L/usr/lib -o /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/rtlilTest /home/buildozer/aports/testing/yosys/src/tests/unit/objtest/kernel/rtlilTest.o -lstdc++ -lm -lrt -ldl -lm -lreadline -lffi -ldl -lz -ltcl8.6 -ltclstub8.6 -lpthread \ -lgtest -lgmock -lgtest_main -lyosys -pthread PASS counters.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/sim' PASS assume_x_first_step.ys PASS sim_adff.ys PASS sim_adffe.ys PASS dpram.ys PASS sim_adlatch.ys Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/sigspecExtractTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from SigSpecRepTest [ RUN ] SigSpecRepTest.Extract [ OK ] SigSpecRepTest.Extract (0 ms) [----------] 1 test from SigSpecRepTest (0 ms total) [----------] Global test environment tear-down [==========] 1 test from 1 test suite ran. (0 ms total) [ PASSED ] 1 test. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/ioTest PASS sim_aldff.ys Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 15 tests from 1 test suite. [----------] Global test environment set-up. [----------] 15 tests from KernelStringfTest [ RUN ] KernelStringfTest.integerTruncation [ OK ] KernelStringfTest.integerTruncation (0 ms) [ RUN ] KernelStringfTest.charFormat [ OK ] KernelStringfTest.charFormat (0 ms) [ RUN ] KernelStringfTest.floatFormat [ OK ] KernelStringfTest.floatFormat (0 ms) [ RUN ] KernelStringfTest.intToFloat [ OK ] KernelStringfTest.intToFloat (0 ms) [ RUN ] KernelStringfTest.floatToInt [ OK ] KernelStringfTest.floatToInt (0 ms) [ RUN ] KernelStringfTest.stringParam [ OK ] KernelStringfTest.stringParam (0 ms) [ RUN ] KernelStringfTest.stringViewParam [ OK ] KernelStringfTest.stringViewParam (0 ms) [ RUN ] KernelStringfTest.idStringParam [ OK ] KernelStringfTest.idStringParam (0 ms) [ RUN ] KernelStringfTest.escapePercent [ OK ] KernelStringfTest.escapePercent (0 ms) [ RUN ] KernelStringfTest.trailingPercent [ OK ] KernelStringfTest.trailingPercent (0 ms) [ RUN ] KernelStringfTest.dynamicWidth [ OK ] KernelStringfTest.dynamicWidth (0 ms) [ RUN ] KernelStringfTest.dynamicPrecision [ OK ] KernelStringfTest.dynamicPrecision (0 ms) [ RUN ] KernelStringfTest.dynamicWidthAndPrecision [ OK ] KernelStringfTest.dynamicWidthAndPrecision (0 ms) [ RUN ] KernelStringfTest.dynamicPrecisionInt [ OK ] KernelStringfTest.dynamicPrecisionInt (0 ms) [ RUN ] KernelStringfTest.dynamicWidthAndPrecisionInt [ OK ] KernelStringfTest.dynamicWidthAndPrecisionInt (0 ms) [----------] 15 tests from KernelStringfTest (0 ms total) [----------] Global test environment tear-down [==========] 15 tests from 1 test suite ran. (0 ms total) [ PASSED ] 15 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/rtlilTest PASS sim_aldffe.ys Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 38 tests from 2 test suites. [----------] Global test environment set-up. [----------] 26 tests from KernelRtlilTest [ RUN ] KernelRtlilTest.ConstAssignCompare [ OK ] KernelRtlilTest.ConstAssignCompare (0 ms) [ RUN ] KernelRtlilTest.ConstStr [ OK ] KernelRtlilTest.ConstStr (0 ms) [ RUN ] KernelRtlilTest.ConstConstIteratorWorks [ OK ] KernelRtlilTest.ConstConstIteratorWorks (0 ms) [ RUN ] KernelRtlilTest.ConstConstIteratorPreincrement [ OK ] KernelRtlilTest.ConstConstIteratorPreincrement (0 ms) [ RUN ] KernelRtlilTest.ConstConstIteratorPostincrement [ OK ] KernelRtlilTest.ConstConstIteratorPostincrement (0 ms) [ RUN ] KernelRtlilTest.ConstIteratorWorks [ OK ] KernelRtlilTest.ConstIteratorWorks (0 ms) [ RUN ] KernelRtlilTest.ConstIteratorPreincrement [ OK ] KernelRtlilTest.ConstIteratorPreincrement (0 ms) [ RUN ] KernelRtlilTest.ConstIteratorPostincrement [ OK ] KernelRtlilTest.ConstIteratorPostincrement (0 ms) [ RUN ] KernelRtlilTest.ConstIteratorWriteWorks [ OK ] KernelRtlilTest.ConstIteratorWriteWorks (0 ms) [ RUN ] KernelRtlilTest.ConstBuilder [ OK ] KernelRtlilTest.ConstBuilder (0 ms) [ RUN ] KernelRtlilTest.ConstSet [ OK ] KernelRtlilTest.ConstSet (0 ms) [ RUN ] KernelRtlilTest.ConstResize [ OK ] KernelRtlilTest.ConstResize (0 ms) [ RUN ] KernelRtlilTest.ConstEqualStr [ OK ] KernelRtlilTest.ConstEqualStr (0 ms) [ RUN ] KernelRtlilTest.ConstEqualBits [ OK ] KernelRtlilTest.ConstEqualBits (0 ms) [ RUN ] KernelRtlilTest.ConstEqualStrBits [ OK ] KernelRtlilTest.ConstEqualStrBits (0 ms) [ RUN ] KernelRtlilTest.ConstEqualHashStrBits [ OK ] KernelRtlilTest.ConstEqualHashStrBits (0 ms) [ RUN ] KernelRtlilTest.ConstIsFullyZero [ OK ] KernelRtlilTest.ConstIsFullyZero (0 ms) [ RUN ] KernelRtlilTest.ConstIsFullyOnes [ OK ] KernelRtlilTest.ConstIsFullyOnes (0 ms) [ RUN ] KernelRtlilTest.ConstIsFullyDef [ OK ] KernelRtlilTest.ConstIsFullyDef (0 ms) [ RUN ] KernelRtlilTest.ConstIsFullyUndef [ OK ] KernelRtlilTest.ConstIsFullyUndef (0 ms) [ RUN ] KernelRtlilTest.ConstIsFullyUndefXOnly [ OK ] KernelRtlilTest.ConstIsFullyUndefXOnly (0 ms) [ RUN ] KernelRtlilTest.ConstIsOnehot [ OK ] KernelRtlilTest.ConstIsOnehot (0 ms) [ RUN ] KernelRtlilTest.OwningIdString [ OK ] KernelRtlilTest.OwningIdString (0 ms) [ RUN ] KernelRtlilTest.LookupAutoidxId [ OK ] KernelRtlilTest.LookupAutoidxId (0 ms) [ RUN ] KernelRtlilTest.NewIdBeginsWith [ OK ] KernelRtlilTest.NewIdBeginsWith (0 ms) [ RUN ] KernelRtlilTest.NewIdIndexing [ OK ] KernelRtlilTest.NewIdIndexing (0 ms) [----------] 26 tests from KernelRtlilTest (0 ms total) [----------] 12 tests from WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__0__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__0__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__0__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__0__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__4__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__4__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__4__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__4__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false___4__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false___4__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true___4__10_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true___4__10_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__0__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__0__1_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__0__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__0__1_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__4__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false__4__1_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__4__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true__4__1_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false___4__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_false___4__1_ (0 ms) [ RUN ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true___4__1_ [ OK ] WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest.WireRtlVsHdlIndexConversion/_true___4__1_ (0 ms) [----------] 12 tests from WireRtlVsHdlIndexConversionInstance/WireRtlVsHdlIndexConversionTest (0 ms total) [----------] Global test environment tear-down [==========] 38 tests from 2 test suites ran. (1 ms total) [ PASSED ] 38 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/rtlilStringTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 4 tests from 1 test suite. [----------] Global test environment set-up. [----------] 4 tests from RtlilStrTest [ RUN ] RtlilStrTest.DesignToString [ OK ] RtlilStrTest.DesignToString (0 ms) [ RUN ] RtlilStrTest.ModuleToString [ OK ] RtlilStrTest.ModuleToString (0 ms) [ RUN ] RtlilStrTest.WireToString [ OK ] RtlilStrTest.WireToString (0 ms) [ RUN ] RtlilStrTest.CellToString [ OK ] RtlilStrTest.CellToString (0 ms) [----------] 4 tests from RtlilStrTest (0 ms total) [----------] Global test environment tear-down [==========] 4 tests from 1 test suite ran. (0 ms total) [ PASSED ] 4 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/sigspecRemove2Test Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 12 tests from 1 test suite. [----------] Global test environment set-up. [----------] 12 tests from SigSpecRepTest [ RUN ] SigSpecRepTest.WithSigSpecPattern [ OK ] SigSpecRepTest.WithSigSpecPattern (0 ms) [ RUN ] SigSpecRepTest.WithPoolPattern [ OK ] SigSpecRepTest.WithPoolPattern (0 ms) [ RUN ] SigSpecRepTest.WithSetPattern [ OK ] SigSpecRepTest.WithSetPattern (0 ms) [ RUN ] SigSpecRepTest.ManyElements [ OK ] SigSpecRepTest.ManyElements (3 ms) [ RUN ] SigSpecRepTest.VeryLargeScalingTest PASS sim_cycles.ys PASS sim_dff.ys PASS sim_dffe.ys [ OK ] SigSpecRepTest.VeryLargeScalingTest (450 ms) [ RUN ] SigSpecRepTest.MultipleSequentialRemovals [ OK ] SigSpecRepTest.MultipleSequentialRemovals (66 ms) [ RUN ] SigSpecRepTest.PoolOverloadLargeDataset PASS opt_dff_srst.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/svtypes' PASS array_assign_flat_multidim_pattern.ys PASS sim_dffsr.ys PASS sim_dlatch.ys [ OK ] SigSpecRepTest.PoolOverloadLargeDataset (329 ms) [ RUN ] SigSpecRepTest.SetOverloadLargeDataset PASS sim_dlatchsr.ys PASS enum_simple.ys PASS logic_rom.ys [ OK ] SigSpecRepTest.SetOverloadLargeDataset (364 ms) [ RUN ] SigSpecRepTest.RemoveAlmostAllElements PASS multirange_subarray_access.ys [ OK ] SigSpecRepTest.RemoveAlmostAllElements (53 ms) [ RUN ] SigSpecRepTest.EmptyPattern [ OK ] SigSpecRepTest.EmptyPattern (0 ms) [ RUN ] SigSpecRepTest.NullWireBitsStay [ OK ] SigSpecRepTest.NullWireBitsStay (0 ms) [ RUN ] SigSpecRepTest.PartialBitRemoval [ OK ] SigSpecRepTest.PartialBitRemoval (0 ms) [----------] 12 tests from SigSpecRepTest (1269 ms total) [----------] Global test environment tear-down [==========] 12 tests from 1 test suite ran. (1269 ms total) [ PASSED ] 12 tests. PASS static_cast_negative.ys PASS uram_sr.ys Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/bitpatternTest PASS sim_sdff.ys Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from BitpatternTest [ RUN ] BitpatternTest.has [ OK ] BitpatternTest.has (0 ms) [----------] 1 test from BitpatternTest (0 ms total) [----------] Global test environment tear-down [==========] 1 test from 1 test suite ran. (0 ms total) [ PASSED ] 1 test. PASS static_cast_nonconst.ys Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/cellTypesTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from CellTypesTest [ RUN ] CellTypesTest.basic PASS sim_sdffce.ys PASS static_cast_verilog.ys Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/logTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from KernelLogTest [ RUN ] KernelLogTest.logvValidValues [ OK ] KernelLogTest.logvValidValues (0 ms) [----------] 1 test from KernelLogTest (0 ms total) [----------] Global test environment tear-down [==========] 1 test from 1 test suite ran. (0 ms total) [ PASSED ] 1 test. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/hashTest PASS static_cast_zero.ys Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 3 tests from 2 test suites. [----------] Global test environment set-up. [----------] 1 test from CommutativeTest [ RUN ] CommutativeTest.basic [ OK ] CommutativeTest.basic (0 ms) [----------] 1 test from CommutativeTest (0 ms total) [----------] 2 tests from PoolHashTest [ RUN ] PoolHashTest.collisions PASS sim_sdffe.ys PASS vcd_var_reference_whitespace.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/sim' ...passed tests in ./sim PASS struct_dynamic_range.ys pool collisions: 3206 PASS typedef_initial_and_assign.ys [ OK ] PoolHashTest.collisions (1153 ms) [ RUN ] PoolHashTest.subset_collisions PASS typedef_memory.ys PASS opt_expr.ys PASS typedef_memory_2.ys PASS typedef_struct_global.ys PASS simple_ram.ys PASS typedef_struct_port.ys PASS array_assign.sv PASS multirange_array.sv PASS shifter.ys PASS static_cast_simple.sv PASS struct_array.sv PASS add_sub.ys PASS struct_simple.sv PASS dff.ys PASS opt_dff_sr.ys PASS struct_sizebits.sv PASS t_mem2.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/techmap' PASS opt_expr_and.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/various' PASS typedef_package.sv PASS lutram.ys PASS opt_expr_alu.ys PASS abstract_init.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/rtlil' PASS typedef_param.sv PASS opt_expr_cmp.ys PASS typedef_scopes.sv PASS bug5424.ys PASS typedef_simple.sv PASS roundtrip-design.sh PASS abc9-nonbox-loop-with-box.ys PASS roundtrip-text.sh make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/rtlil' ...passed tests in ./rtlil PASS logic.ys PASS opt_expr_combined_assign.ys PASS typedef_struct.sv PASS opt_expr_constconn.ys PASS expose_dff.ys PASS opt_expr_consumex.ys PASS blockram.ys pool subset collisions: 92 PASS union_simple.sv make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/svtypes' ...passed tests in ./svtypes PASS dffs.ys [ OK ] PoolHashTest.subset_collisions (4307 ms) [----------] 2 tests from PoolHashTest (5460 ms total) [----------] Global test environment tear-down [==========] 3 tests from 2 test suites ran. (5460 ms total) [ PASSED ] 3 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/threadingTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 25 tests from 1 test suite. [----------] Global test environment set-up. [----------] 25 tests from ThreadingTest [ RUN ] ThreadingTest.ParallelDispatchThreadPoolCreate [ OK ] ThreadingTest.ParallelDispatchThreadPoolCreate (1 ms) [ RUN ] ThreadingTest.ParallelDispatchThreadPoolRunSimple [ OK ] ThreadingTest.ParallelDispatchThreadPoolRunSimple (0 ms) [ RUN ] ThreadingTest.ParallelDispatchThreadPoolRunMultiple [ OK ] ThreadingTest.ParallelDispatchThreadPoolRunMultiple (0 ms) [ RUN ] ThreadingTest.ParallelDispatchThreadPoolRunCtxThreadNums [ OK ] ThreadingTest.ParallelDispatchThreadPoolRunCtxThreadNums (1 ms) [ RUN ] ThreadingTest.ParallelDispatchThreadPoolItemRange [ OK ] ThreadingTest.ParallelDispatchThreadPoolItemRange (3 ms) [ RUN ] ThreadingTest.ParallelDispatchThreadPoolSubpool [ OK ] ThreadingTest.ParallelDispatchThreadPoolSubpool (1 ms) [ RUN ] ThreadingTest.IntRangeIteration [ OK ] ThreadingTest.IntRangeIteration (0 ms) [ RUN ] ThreadingTest.IntRangeEmpty [ OK ] ThreadingTest.IntRangeEmpty (0 ms) [ RUN ] ThreadingTest.ItemRangeForWorker [ OK ] ThreadingTest.ItemRangeForWorker (0 ms) [ RUN ] ThreadingTest.ItemRangeForWorkerZeroThreads [ OK ] ThreadingTest.ItemRangeForWorkerZeroThreads (0 ms) [ RUN ] ThreadingTest.ShardedVectorBasic [ OK ] ThreadingTest.ShardedVectorBasic (0 ms) [ RUN ] ThreadingTest.MonotonicFlagBasic [ OK ] ThreadingTest.MonotonicFlagBasic (0 ms) [ RUN ] ThreadingTest.MonotonicFlagSetAndReturnOld [ OK ] ThreadingTest.MonotonicFlagSetAndReturnOld (0 ms) [ RUN ] ThreadingTest.ConcurrentQueueBasic [ OK ] ThreadingTest.ConcurrentQueueBasic (0 ms) [ RUN ] ThreadingTest.ConcurrentQueueTryPopEmpty [ OK ] ThreadingTest.ConcurrentQueueTryPopEmpty (0 ms) [ RUN ] ThreadingTest.ConcurrentQueueClose [ OK ] ThreadingTest.ConcurrentQueueClose (0 ms) [ RUN ] ThreadingTest.ThreadPoolCreate [ OK ] ThreadingTest.ThreadPoolCreate (0 ms) [ RUN ] ThreadingTest.ThreadPoolMultipleThreads [ OK ] ThreadingTest.ThreadPoolMultipleThreads (2 ms) [ RUN ] ThreadingTest.ShardedHashtableBasic [ OK ] ThreadingTest.ShardedHashtableBasic (0 ms) [ RUN ] ThreadingTest.ShardedHashtableParallelInsert [ OK ] ThreadingTest.ShardedHashtableParallelInsert (2 ms) [ RUN ] ThreadingTest.ShardedHashtableCollision [ OK ] ThreadingTest.ShardedHashtableCollision (0 ms) [ RUN ] ThreadingTest.ShardedHashtableEmpty [ OK ] ThreadingTest.ShardedHashtableEmpty (0 ms) [ RUN ] ThreadingTest.ConcurrentWorkQueueSingleThread [ OK ] ThreadingTest.ConcurrentWorkQueueSingleThread (0 ms) [ RUN ] ThreadingTest.ConcurrentWorkQueueBatching [ OK ] ThreadingTest.ConcurrentWorkQueueBatching (0 ms) [ RUN ] ThreadingTest.ConcurrentWorkQueueParallel [ OK ] ThreadingTest.ConcurrentWorkQueueParallel (0 ms) [----------] 25 tests from ThreadingTest (17 ms total) [----------] Global test environment tear-down [==========] 25 tests from 1 test suite ran. (17 ms total) [ PASSED ] 25 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/kernel/modindexTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 2 tests from 2 test suites. [----------] Global test environment set-up. [----------] 1 test from ModIndexSwapTest [ RUN ] ModIndexSwapTest.has [ OK ] ModIndexSwapTest.has (0 ms) [----------] 1 test from ModIndexSwapTest (0 ms total) [----------] 1 test from ModIndexDeleteTest [ RUN ] ModIndexDeleteTest.has --- ModIndex Dump --- BIT $w: PORT: $not.A[0] ($_NOT_) BIT $o: PRIMARY OUTPUT PORT: $not.Y[0] ($_NOT_) [ OK ] ModIndexDeleteTest.has (0 ms) [----------] 1 test from ModIndexDeleteTest (0 ms total) [----------] Global test environment tear-down [==========] 2 tests from 2 test suites ran. (0 ms total) [ PASSED ] 2 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/opt/optDffFindComplementaryPatternTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 12 tests from 1 test suite. [----------] Global test environment set-up. [----------] 12 tests from FindComplementaryPatternVarTest [ RUN ] FindComplementaryPatternVarTest.EmptyPatterns [ OK ] FindComplementaryPatternVarTest.EmptyPatterns (0 ms) [ RUN ] FindComplementaryPatternVarTest.IdenticalSingleVar [ OK ] FindComplementaryPatternVarTest.IdenticalSingleVar (0 ms) [ RUN ] FindComplementaryPatternVarTest.ComplementarySingleVar [ OK ] FindComplementaryPatternVarTest.ComplementarySingleVar (0 ms) [ RUN ] FindComplementaryPatternVarTest.MissingKeyInRight [ OK ] FindComplementaryPatternVarTest.MissingKeyInRight (0 ms) [ RUN ] FindComplementaryPatternVarTest.TwoVarsOneComplementary [ OK ] FindComplementaryPatternVarTest.TwoVarsOneComplementary (0 ms) [ RUN ] FindComplementaryPatternVarTest.TwoVarsBothComplementary [ OK ] FindComplementaryPatternVarTest.TwoVarsBothComplementary (0 ms) [ RUN ] FindComplementaryPatternVarTest.LeftSubsetOfRight [ OK ] FindComplementaryPatternVarTest.LeftSubsetOfRight (0 ms) [ RUN ] FindComplementaryPatternVarTest.ThreeVarsAllSame [ OK ] FindComplementaryPatternVarTest.ThreeVarsAllSame (0 ms) [ RUN ] FindComplementaryPatternVarTest.PracticalPatternSimplification [ OK ] FindComplementaryPatternVarTest.PracticalPatternSimplification (0 ms) [ RUN ] FindComplementaryPatternVarTest.MuxTreeClockEnableDetection [ OK ] FindComplementaryPatternVarTest.MuxTreeClockEnableDetection (0 ms) [ RUN ] FindComplementaryPatternVarTest.AsymmetricPatterns [ OK ] FindComplementaryPatternVarTest.AsymmetricPatterns (0 ms) [ RUN ] FindComplementaryPatternVarTest.WireOffsetDistinction [ OK ] FindComplementaryPatternVarTest.WireOffsetDistinction (0 ms) [----------] 12 tests from FindComplementaryPatternVarTest (1 ms total) [----------] Global test environment tear-down [==========] 12 tests from 1 test suite ran. (1 ms total) [ PASSED ] 12 tests. Running /home/buildozer/aports/testing/yosys/src/tests/unit/bintest/techmap/libparseTest Running main() from /home/buildozer/aports/main/gtest/src/googletest-1.17.0/googletest/src/gtest_main.cc [==========] Running 1 test from 1 test suite. [----------] Global test environment set-up. [----------] 1 test from TechmapLibparseTest [ RUN ] TechmapLibparseTest.LibertyExpressionSpace [ OK ] TechmapLibparseTest.LibertyExpressionSpace (0 ms) [----------] 1 test from TechmapLibparseTest (0 ms total) [----------] Global test environment tear-down [==========] 1 test from 1 test suite ran. (0 ms total) [ PASSED ] 1 test. make[1]: Leaving directory '/home/buildozer/aports/testing/yosys/src' PASS opt_expr_mux_undef.ys PASS opt_expr_more.ys PASS abc9.ys PASS opt_expr_or.ys PASS abc_state.ys PASS latches.ys PASS abstract_initstates.ys PASS fminit_noexpand.ys PASS abstract_state.ys PASS opt_expr_shift.ys PASS opt_expr_shr_int_max.ys PASS abstract_value.ys PASS opt_expr_xnor.ys PASS logic.ys PASS opt_expr_xor.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/verilog' PASS absurd_width.ys PASS absurd_width_const.ys PASS always_comb_latch_1.ys PASS always_comb_latch_2.ys PASS always_comb_latch_3.ys PASS always_comb_latch_4.ys PASS always_comb_nolatch_1.ys PASS clk2fflogic.ys PASS always_comb_nolatch_2.ys PASS always_comb_nolatch_3.ys PASS always_comb_nolatch_4.ys PASS fminit_seq_width.ys PASS always_comb_nolatch_5.ys PASS aiger2.ys PASS always_comb_nolatch_6.ys PASS aiger_dff.ys PASS attrib05_port_conn.ys PASS asgn_expr.ys PASS attrib07_func_call.ys PASS asgn_expr_not_proc_1.ys PASS autoname.ys PASS asgn_expr_not_proc_2.ys PASS blackbox_wb.ys PASS box_derive.ys PASS asgn_expr_not_proc_3.ys PASS asgn_expr_not_proc_4.ys PASS bufnorm_opt_clean.ys PASS asgn_expr_not_proc_5.ys PASS adffs.ys PASS asgn_expr_not_sv_1.ys PASS bug1496.ys PASS asgn_expr_not_sv_2.ys PASS asgn_expr_not_sv_3.ys PASS abc_temp_dir_sanitization.ys PASS asgn_expr_not_sv_4.ys PASS bug1531.ys PASS assign_to_reg.ys PASS atom_type_signedness.ys PASS bug1614.ys PASS automatic_lifetime.ys PASS bug1710.ys PASS bug1745.ys PASS block_end_label_only.ys PASS bug1781.ys PASS block_end_label_wrong.ys PASS block_labels.ys PASS bug1876.ys PASS bug2037.ys PASS bug2042-sv.ys PASS bug2014.ys PASS bug2042.ys PASS bug2493.ys PASS bug3462.ys PASS bug4785.ys PASS grom.ys PASS bug5572.ys PASS bug3515.ys PASS initval.ys PASS bug656.ys PASS conflict_assert.ys PASS conflict_cell_memory.ys PASS conflict_interface_port.ys PASS conflict_memory_wire.ys PASS conflict_pwire.ys PASS conflict_wire_memory.ys PASS lutram.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arith_tree' PASS const_arst.ys PASS bug3879.ys PASS bug4082.ys PASS bug4865.ys PASS const_sr.ys PASS constparser_f.ys PASS bug4909.ys PASS constparser_f_file.ys PASS cellarray_array_connections.ys PASS constparser_g.ys PASS arith_tree_add_chains.ys PASS delay_mintypmax.ys PASS delay_risefall.ys PASS add_sub.ys PASS delay_time_scale.ys PASS doubleslash.ys PASS fcall_smoke.ys PASS for_decl_no_init.ys PASS for_decl_no_sv.ys PASS for_decl_shadow.ys PASS check.ys PASS func_arg_mismatch_1.ys PASS func_arg_mismatch_2.ys PASS sim_counter.ys PASS func_arg_mismatch_3.ys PASS func_arg_mismatch_4.ys PASS check_2.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/simple' PASS arith_tree_alu_macc_equiv.ys PASS func_task_arg_copying.ys PASS arith_tree_edge_cases.ys PASS func_tern_hint.ys PASS func_typename_ret.ys PASS tribuf.ys PASS arith_tree_idempotent.ys PASS t_mem0.ys PASS sizebits.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/simple_abc9' PASS fsm.ys PASS arith_tree_equiv.ys PASS aes_kexp128.v PASS arith_tree_negative.ys PASS aes_kexp128.v PASS splice.ys PASS arith_tree_sub_chains.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arith_tree' ...passed tests in ./arith_tree PASS adff2dff.ys PASS gen_block_end_label_only.ys PASS check_3.ys PASS opt_lut_elim.ys PASS t_mem1.ys PASS opt_lut.ys PASS share.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/sat' ...passed tests in ./sat PASS opt_lut_ins.ys PASS opt_lut_port.ys PASS check_4.ys PASS always01.v PASS celledges_shift.ys PASS chformal_check.ys PASS chformal_coverenable.ys PASS abc9.ys PASS const_arg_loop.ys PASS bug3670.ys PASS const_func_block_var.ys PASS mul.ys PASS gen_block_end_label_wrong.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/hana' PASS autopurge.ys PASS const_func.ys PASS const_shift_empty_arg.ys PASS opt_mem_priority.ys PASS constant_drive_conflict.ys PASS constcomment.ys PASS constmsk_test.ys PASS aigmap.ys PASS countbits.ys PASS bmuxmap_pmux.ys PASS cutpoint_blackbox.ys PASS cutpoint_whole.ys PASS debugon.ys PASS deminout_unused.ys PASS design.ys PASS design1.ys PASS design2.ys PASS design_equal_fail.ys PASS design_equal_pass.ys PASS always02.v PASS always03.v PASS abc9.v PASS opt_mem_feedback.ys PASS always01.v PASS opt_merge_basic.ys PASS opt_merge_init.ys PASS opt_merge_keep.ys PASS opt_merge_properties.ys PASS arraycells.v PASS always02.v PASS opt_pow.ys PASS opt_reduce_andor.ys PASS opt_reduce_bmux.ys PASS opt_reduce_demux.ys PASS always03.v PASS bug1460.ys PASS arrays01.v PASS div.ys PASS shifter.ys PASS opt_rmdff_sat.ys PASS blockram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/analogdevices' ...passed tests in ./arch/analogdevices make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/asicworld' PASS logic.ys PASS arraycells.v PASS opt_rmdff.ys PASS opt_share_add_sub.ys PASS opt_share_bug2334.ys PASS genblk_case.ys PASS opt_share_bug2335.ys PASS opt_share_bug2336.ys PASS opt_share_bug2538.ys PASS arrays02.sv PASS opt_share_cat.ys PASS opt_share_cat_multiuser.ys PASS arrays01.v PASS opt_share_diff_port_widths.ys PASS opt_share_extend.ys PASS mult.ys PASS buf.ys PASS test_parse2synthtrans.v PASS elab_sys_tasks.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/realmath' PASS opt_share_large_pmux_cat.ys PASS code_hdl_models_GrayCounter.v PASS uut_00000 PASS arrays02.sv PASS opt_share_large_pmux_cat_multipart.ys PASS uut_00001 PASS uut_00002 PASS bug1462.ys PASS opt_share_large_pmux_multipart.ys PASS bug1480.ys PASS uut_00003 PASS opt_share_large_pmux_part.ys PASS uut_00004 PASS uut_00005 PASS opt_share_mux_tree.ys PASS uut_00006 PASS opt_hier.tcl make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/opt' ...passed tests in ./opt PASS macc.ys PASS code_hdl_models_arbiter.v PASS code_hdl_models_arbiter_tb.v PASS uut_00007 PASS test_intermout.v PASS equiv_assume.ys PASS uut_00008 PASS uut_00009 PASS widemux.ys PASS uut_00010 PASS uut_00011 PASS attrib01_module.v make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/share' PASS uut_00000.ys PASS arrays03.sv PASS uut_00001.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/opt_share' PASS uut_00012 PASS uut_00002.ys PASS uut_00000.ys PASS ram_SDP.ys PASS uut_00003.ys PASS uut_00001.ys PASS uut_00013 PASS uut_00002.ys PASS uut_00004.ys PASS uut_00005.ys PASS uut_00003.ys PASS attrib01_module.v PASS uut_00014 PASS uut_00006.ys PASS arrays03.sv PASS uut_00004.ys PASS uut_00005.ys PASS uut_00007.ys PASS tribuf.ys PASS genblk_port_decl.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/fsm' PASS uut_00008.ys PASS uut_00006.ys PASS dsp.ys PASS uut_00015 PASS uut_00007.ys PASS uut_00009.ys PASS uut_00008.ys PASS test_parser.v PASS rom.ys PASS uut_00009.ys PASS shifter.ys PASS uut_00011.ys PASS attrib02_port_decl.v PASS uut_00010.ys PASS uut_00010.ys PASS genblk_wire.ys PASS uut_00012.ys PASS uut_00016 PASS uut_00011.ys PASS equiv_make_make_assert.ys PASS uut_00013.ys PASS uut_00012.ys PASS uut_00014.ys PASS uut_00013.ys PASS code_hdl_models_clk_div.v PASS uut_00017 PASS uut_00014.ys PASS uut_00015.ys PASS bufnorm.ys PASS uut_00016.ys PASS uut_00016.ys PASS uut_00017.ys PASS uut_00018 PASS uut_00018.ys PASS uut_00019 PASS uut_00019.ys PASS uut_00020.ys PASS ram_TDP.ys PASS uut_00022.ys PASS uut_00021.ys PASS uut_00020 PASS bug1605.ys PASS uut_00023.ys PASS uut_00001.ys PASS uut_00024.ys PASS uut_00021 PASS uut_00025.ys PASS uut_00022 PASS code_hdl_models_clk_div_45.v PASS uut_00026.ys PASS uut_00028.ys PASS uut_00027.ys PASS equiv_opt_multiclock.ys PASS uut_00023 PASS uut_00029.ys PASS uut_00030.ys PASS uut_00024 PASS uut_00031.ys PASS genfor_decl_no_init.ys PASS uut_00025 make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/memlib' PASS uut_00032.ys PASS uut_00033.ys PASS uut_00026 PASS uut_00034.ys PASS test_simulation_and.v PASS uut_00035.ys PASS uut_00027 PASS bug1598.ys PASS uut_00036.ys PASS uut_00028 PASS uut_00037.ys PASS test_simulation_always.v PASS uut_00038.ys PASS uut_00039.ys PASS uut_00029 PASS uut_00040.ys PASS booth.ys PASS uut_00041.ys PASS bug2183.ys PASS uut_00030 PASS attrib02_port_decl.v PASS bug2321.ys PASS uut_00042.ys PASS bug2332.ys PASS uut_00031 PASS uut_00043.ys PASS test_simulation_buffer.v PASS uut_00044.ys PASS asgn_binop.sv PASS bug2759.ys PASS uut_00045.ys PASS uut_00032 PASS uut_00046.ys PASS counter.ys PASS uut_00047.ys PASS uut_00033 PASS uut_00048.ys PASS uut_00049.ys PASS uut_00034 PASS bug2972.ys PASS uut_00050.ys PASS spram.ys PASS uut_00051.ys PASS attrib03_parameter.v PASS uut_00035 PASS equiv_opt_undef.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/bram' PASS uut_00052.ys PASS uut_00036 PASS uut_00053.ys PASS bug5574.ys PASS uut_00054.ys PASS cellmatch.ys PASS uut_00055.ys PASS cellname.ys PASS uut_00037 PASS clkbufmap.ys PASS attrib04_net_var.v PASS attrib03_parameter.v PASS uut_00056.ys PASS constmap.ys PASS uut_00057.ys PASS genfor_decl_no_sv.ys PASS uut_00058.ys PASS uut_00038 PASS code_hdl_models_d_ff_gates.v PASS uut_00059.ys PASS uut_00060.ys PASS uut_00040 PASS uut_00061.ys PASS uut_00039 PASS dff2ff.ys PASS mux.ys PASS code_hdl_models_d_latch_gates.v PASS uut_00041 PASS uut_00062.ys PASS uut_00063.ys PASS uut_00064.ys PASS uut_00003.ys PASS uut_00042 PASS uut_00065.ys PASS async_small PASS uut_00043 PASS exec.ys PASS uut_00005.ys PASS asgn_binop.sv PASS genvar_loop_decl_1.ys PASS attrib06_operator_suffix.v PASS uut_00066.ys PASS uut_00044 PASS uut_00017.ys PASS uut_00067.ys PASS uut_00045 PASS uut_00068.ys PASS uut_00069.ys PASS uut_00046 PASS uut_00070.ys PASS uut_00047 PASS uut_00071.ys PASS uut_00072.ys PASS uut_00048 PASS uut_00000.ys PASS uut_00073.ys PASS attrib08_mod_inst.v PASS uut_00074.ys PASS attrib04_net_var.v PASS uut_00075.ys PASS uut_00049 PASS uut_00076.ys PASS uut_00077.ys PASS bram_00_01 PASS uut_00050 PASS test_simulation_decoder.v PASS uut_00078.ys PASS uut_00079.ys PASS uut_00051 PASS uut_00080.ys PASS uut_00081.ys PASS attrib09_case.v PASS uut_00082.ys PASS uut_00052 PASS uut_00002.ys PASS cmp2lcu.ys PASS uut_00083.ys PASS dffinit.ys PASS genvar_loop_decl_2.ys PASS async_big PASS uut_00053 PASS uut_00084.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/svinterfaces' PASS attrib06_operator_suffix.v PASS uut_00085.ys PASS load_and_derive.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/xprop' PASS uut_00054 PASS uut_00086.ys PASS latches.ys PASS tribuf.ys PASS uut_00087.ys PASS uut_00088.ys PASS bram_00_02 PASS uut_00055 PASS uut_00089.ys PASS fib.ys PASS attrib08_mod_inst.v PASS uut_00090.ys PASS uut_00056 PASS uut_00091.ys PASS test_simulation_inc.v PASS uut_00092.ys PASS carryadd.v PASS dfflegalize_adff.ys PASS uut_00057 PASS adffs.ys PASS uut_00018.ys PASS positional_args.ys PASS genvar_loop_decl_3.ys PASS uut_00093.ys PASS uut_00058 PASS case_expr_const.v PASS uut_00094.ys PASS uut_00095.ys PASS uut_00059 PASS fib_tern.ys PASS uut_00096.ys PASS uut_00097.ys PASS uut_00060 PASS case_expr_extend.sv PASS uut_00098.ys PASS formalff_declockgate.ys PASS async_small_block PASS uut_00099.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/share' PASS svinterface1 ...passed tests in ./share PASS uut_00006.ys PASS uut_00061 PASS resolve_types.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/svinterfaces' ...passed tests in ./svinterfaces PASS attrib09_case.v PASS uut_00062 PASS bram_00_03 make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/select' PASS boxes_equals_name.ys PASS xprop_not_3s_5 PASS boxes_equals_operators.ys PASS case_expr_non_const.v PASS uut_00063 PASS mul.ys PASS boxes_equals_pattern.ys PASS boxes_equals_wildcard.ys PASS boxes_import.ys PASS case_expr_const.v PASS uut_00019.ys PASS boxes_no_equals.ys PASS uut_00064 PASS boxes_no_equals_clean.ys PASS boxes_setattr.ys PASS boxes_stack.ys PASS internal_selects.ys PASS list_mod.ys PASS uut_00065 PASS mod-attribute.ys PASS sync_big PASS no_warn_assert.ys PASS no_warn_prefixed_arg_memb.ys PASS carryadd.v PASS no_warn_prefixed_empty_select_arg.ys PASS bram_00_04 PASS unset.ys PASS case_expr_query.sv PASS unset2.ys PASS warn_empty_select_arg.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/select' ...passed tests in ./select PASS uut_00066 PASS dfflegalize_adlatch.ys PASS global_parameter.ys PASS uut_00067 PASS test_simulation_nand.v PASS dfflegalize_adff_init.ys PASS uut_00068 PASS case_expr_extend.sv PASS uut_00069 PASS test_simulation_nor.v PASS uut_00004.ys PASS code_hdl_models_decoder_2to4_gates.v PASS xprop_pos_3s_5 make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/peepopt' PASS uut_00020.ys PASS dfflegalize_adlatch_init.ys PASS uut_00070 PASS uut_00071 PASS test_simulation_or.v PASS uut_00072 PASS fsm-arst.ys PASS dfflegalize_aldff.ys PASS uut_00074 PASS case_expr_non_const.v PASS uut_00073 PASS uut_00075 PASS uut_00008.ys PASS dfflegalize_aldff_init.ys PASS uut_00076 PASS case_expr_query.sv PASS test_simulation_mux.v PASS uut_00077 PASS xprop_neg_3s_5 PASS const_branch_finish.v PASS uut_00078 PASS uut_00079 PASS const_branch_finish.v PASS uut_00080 PASS uut_00021.ys PASS test_simulation_seq.v PASS hidden_decl.ys PASS uut_00081 PASS dfflegalize_dff.ys PASS uut_00082 PASS uut_00083 PASS xprop_and_1u1_1 PASS bram_01_02 PASS uut_00084 PASS uut_00007.ys PASS uut_00085 PASS uut_00086 PASS uut_00087 PASS xprop_and_1s1_2 PASS uut_00088 PASS muldiv_c.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/peepopt' ...passed tests in ./peepopt PASS func_port_implied_dir.ys PASS uut_00089 PASS uut_00090 PASS sync_big_sdp PASS uut_00091 PASS bram_01_00 PASS uut_00092 PASS uut_00093 PASS uut_00094 PASS uut_00095 PASS const_fold_func.v PASS xprop_and_2u2_2 PASS uut_00096 PASS uut_00097 PASS uut_00098 PASS uut_00099 make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/realmath' ...passed tests in ./realmath PASS dffs.ys PASS uut_00015.ys PASS uut_00022.ys PASS uut_00023.ys PASS bram_01_03 PASS sync_small PASS uut_00024.ys PASS uut_00025.ys PASS xprop_or_1u1_1 PASS uut_00026.ys PASS dsp_fastfir.ys PASS ifdef_nest.ys PASS uut_00028.ys PASS dfflegalize_dff_init.ys PASS xprop_or_1s1_2 PASS bram_01_04 PASS dfflegalize_dffsr.ys PASS xprop_or_2u2_2 PASS test_simulation_shifter.v PASS async_big_block PASS gen_if_null.ys PASS test_simulation_sop.v PASS xprop_xor_1u1_1 PASS bram_02_00 PASS dfflegalize_dffsr_init.ys PASS sync_big_lut PASS dfflegalize_dlatch.ys PASS dfflegalize_dlatch_const.ys PASS uut_00010.ys PASS const_func_shadow.v make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/proc' PASS xprop_xor_1s1_2 PASS bug2619.ys PASS sync_small_block PASS dfflegalize_dlatch_init.ys PASS bug2656.ys PASS bug2962.ys PASS bug4712.ys PASS bug5572.ys PASS dfflegalize_dlatchsr.ys PASS bug_1268.ys PASS case_attr.ys PASS clean_undef_case.ys PASS proc_dff.ys PASS bram_02_01 PASS sync_small_block_attr PASS code_hdl_models_cam.v PASS proc_rom.ys PASS rmdead.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/proc' ...passed tests in ./proc PASS init_lut_zeros_zero PASS dfflegalize_dlatchsr_init.ys PASS test_simulation_techmap.v PASS xprop_xor_2u2_2 PASS code_hdl_models_decoder_using_assign.v PASS init_lut_zeros_any PASS init_lut_val_zero PASS dfflegalize_inv.ys PASS dfflegalize_mince.ys PASS dfflegalize_minsrst.ys PASS code_hdl_models_decoder_using_case.v PASS init_lut_val_any PASS dfflegalize_sr.ys PASS xprop_xnor_1u1_1 PASS dfflegalize_sr_init.ys PASS bram_02_03 PASS logic.ys PASS init_lut_val_no_undef PASS code_hdl_models_dff_async_reset.v PASS dfflibmap.ys PASS init_lut_val2_any PASS code_hdl_models_dff_sync_reset.v PASS xprop_xnor_1s1_2 PASS bram_02_04 PASS uut_00011.ys PASS init_lut_val2_no_undef PASS code_hdl_models_encoder_4to2_gates.v PASS dsp_simd.ys PASS init_lut_x_none PASS dfflibmap_formal.ys PASS xprop_xnor_2u2_2 PASS init_lut_x_zero PASS bram_03_00 PASS code_hdl_models_encoder_using_case.v PASS init_lut_x_any PASS const_fold_func.v PASS dfflibmap_proc_formal.ys PASS constpower.v PASS dffunmap.ys PASS extractinv.ys PASS test_simulation_techmap_tech.v PASS iopadmap.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/blif' PASS lut2bmux.ys PASS bug2729.ys PASS bug3374.ys PASS lut2mux.ys PASS bug3385.ys PASS init_lut_x_no_undef PASS module_not_derived.ys PASS uut_00009.ys PASS gatesi.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/blif' ...passed tests in ./blif PASS pmux2mux.ys PASS ram_18b2B PASS test_simulation_vlib.v PASS techmap_chtype.ys PASS adffs.ys PASS code_hdl_models_encoder_using_if.v PASS ram_9b1B PASS xprop_add_5u3_3 PASS constmuldivmod.v PASS bram_03_01 PASS ram_4b1B PASS ifdef_unterminated.ys PASS case_large.v PASS test_simulation_xnor.v PASS ram_2b1B PASS code_hdl_models_full_adder_gates.v PASS code_hdl_models_full_subtracter_gates.v PASS defvalue.sv PASS shiftx2mux.ys PASS techmap_replace.ys PASS ram_1b1B PASS wireinit.ys PASS bram_03_02 PASS xaiger2-5169.ys PASS test_simulation_xor.v make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/hana' ...passed tests in ./hana PASS init_9b1B_zeros_zero PASS xprop_add_5s3_3 PASS mux.ys PASS zinit.ys PASS code_hdl_models_gray_counter.v PASS clockgate.tcl PASS bug1644.ys PASS init_9b1B_zeros_any PASS uut_00014.ys PASS global_scope.ys PASS fsm.ys PASS code_hdl_models_half_adder_gates.v PASS bram_03_04 PASS uut_00013.ys PASS init_9b1B_val_zero PASS han-carlson.tcl PASS code_hdl_models_lfsr.v PASS incdec.ys PASS xprop_sub_5u3_3 PASS init_9b1B_val_any PASS code_hdl_models_lfsr_updown.v PASS kogge-stone.tcl PASS init_9b1B_val_no_undef PASS uut_00012.ys PASS fuse_mac.ys PASS uut_00027.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/nexus' ...passed tests in ./arch/nexus PASS uut_00029.ys PASS uut_00030.ys PASS uut_00031.ys PASS uut_00032.ys PASS uut_00033.ys PASS init_13b2B_val_any PASS code_hdl_models_mux_2to1_gates.v PASS uut_00034.ys PASS sklansky.tcl PASS uut_00035.ys PASS uut_00036.ys PASS uut_00037.ys PASS bug5495.sh PASS uut_00038.ys PASS const_func_shadow.v PASS xprop_sub_5s3_3 PASS uut_00039.ys PASS init_18b2B_val_any PASS constpower.v PASS include_self.ys PASS init_18b2B_val_no_undef PASS mem_simple_4x1_runtest.sh PASS recursive_runtest.sh make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/techmap' ...passed tests in ./techmap PASS gzip_verilog.ys PASS code_hdl_models_mux_using_assign.v PASS localparam_no_default_1.ys PASS bram_04_00 PASS init_4b1B_x_none PASS xprop_mul_5u3_3 PASS bram_04_01 PASS init_4b1B_x_zero PASS dff_different_styles.v PASS code_hdl_models_mux_using_case.v PASS uut_00015.ys PASS int_types.ys PASS init_4b1B_x_any make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch' PASS dff_init.v PASS ice40_cells_sim_ICE40_HX PASS init_4b1B_x_no_undef PASS constmuldivmod.v PASS xilinx_cells_sim PASS uut_00016.ys PASS ice40_cells_sim_ICE40_LP PASS ice40_cells_sim_ICE40_U PASS intel_alm_cyclonev_cells_sim PASS greenpak4_cells_sim PASS microchip_cells_sim PASS coolrunner2_cells_sim PASS achronix_speedster22i_cells_sim PASS sf2_cells_sim PASS anlogic_cells_sim PASS gowin_cells_sim PASS efinix_cells_sim PASS intel_cycloneiv_cells_sim PASS intel_cycloneive_cells_sim PASS intel_max10_cells_sim PASS intel_cyclone10lp_cells_sim PASS analogdevices_cells_sim PASS nanoxplore_cells_sim PASS quicklogic_pp3_cells_sim PASS quicklogic_qlf_k6n10f_cells_sim PASS quicklogic_common_cells_sim PASS code_hdl_models_mux_using_if.v PASS gatemate_cells_sim PASS clock_a4_wANYrNEGsFalse PASS simcells PASS simlib make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch' ...passed tests in ./arch PASS mux.ys PASS clock_a4_wANYrPOSsFalse PASS clock_a4_wANYrANYsFalse PASS clock_a4_wNEGrANYsFalse PASS bram_04_02 PASS code_hdl_models_one_hot_cnt.v PASS forgen01.v PASS clock_a4_wNEGrPOSsFalse PASS fiedler-cooley.v PASS localparam_no_default_2.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/rpc' PASS defvalue.sv PASS exec.ys PASS xprop_mul_5s3_3 PASS help.ys PASS uut_00041.ys PASS frontend.py make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/rpc' ...passed tests in ./rpc PASS code_hdl_models_parallel_crc.v PASS clock_a4_wNEGrNEGsFalse PASS hierarchy_defer.ys PASS macro_arg_tromp.ys PASS case_large.v PASS code_hdl_models_parity_using_assign.v PASS clock_a4_wPOSrANYsFalse PASS dff.ys PASS opt_lut_ins.ys PASS clock_a4_wPOSrNEGsFalse PASS xprop_div_5u3_3 PASS xprop_div_5s3_3 PASS hierarchy_generate.ys PASS uut_00042.ys PASS clock_a4_wPOSrPOSsFalse PASS macro_unapplied.ys PASS code_hdl_models_parity_using_bitwise.v PASS mul.ys PASS uut_00043.ys PASS bram_04_03 make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/bram' ...passed tests in ./bram PASS forgen02.v PASS clock_a4_wANYrANYsTrue PASS uut_00018.ys PASS uut_00019.ys PASS dff_different_styles.v PASS clock_a4_wNEGrPOSsTrue PASS xprop_mod_5u3_3 PASS clock_a4_wNEGrNEGsTrue PASS macro_unapplied_newline.ys PASS uut_00017.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/memfile' PASS uut_00044.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/fmt' PASS parent_content1 PASS initial_display PASS parent_content2_temp PASS parent_content2_full PASS same_content1 PASS always_display_clk PASS dff_init.v PASS same_content2 PASS code_hdl_models_parity_using_function.v PASS child_content1 PASS child_content2_temp PASS child_content2_direct PASS clock_a4_wPOSrNEGsTrue PASS always_display_clk_rst PASS fail_empty_filename PASS uut_00020.ys PASS fail_missing_file make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/memfile' ...passed tests in ./memfile PASS always_display_star PASS hierarchy_param.ys PASS always_display_clk_en PASS always_display_clk_rst_en PASS latches.ys PASS always_display_star_en PASS clock_a4_wPOSrPOSsTrue PASS xprop_divfloor_5u3_3 PASS roundtrip_dec_unsigned PASS forloops.v PASS uut_00045.ys PASS roundtrip_dec_signed PASS roundtrip_hex_unsigned PASS unmixed PASS xprop_mod_5s3_3 PASS roundtrip_hex_signed PASS roundtrip_oct_unsigned PASS roundtrip_oct_signed PASS mem_bounds.ys PASS fsm.v make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/cxxrtl' PASS roundtrip_bin_unsigned PASS mixed_9_18 PASS dynamic_part_select.ys PASS roundtrip_bin_signed PASS meminit.ys PASS mixed_18_9 PASS code_hdl_models_rom_using_case.v PASS dsp_abc9.ys PASS code_hdl_models_pri_encoder_using_assign.v PASS fiedler-cooley.v PASS xprop_divfloor_5s3_3 PASS mixed_36_9 PASS mixed_4_2 PASS add_sub.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/liberty' PASS cxxrtl_value PASS tdp PASS uut_00024.ys PASS XNOR2X1.lib PASS busdef.lib PASS sync_shared PASS code_hdl_models_serial_crc.v PASS sync_2clk PASS dff.lib PASS xprop_modfloor_5u3_3 PASS idranges.lib PASS code_hdl_models_tff_async_reset.v PASS issue3498_bad.lib PASS sync_2clk_shared PASS non-ascii.lib PASS code_hdl_models_tff_sync_reset.v PASS normal.lib PASS sync_trans_old_old PASS macc.ys PASS processdefs.lib PASS ice40_mince_abc9.ys PASS integer_range_bad_syntax.ys PASS sync_trans_old_new PASS uut_00022.ys PASS integer_real_bad_syntax.ys PASS json_escape_chars.ys PASS json_param_defaults.ys PASS json_scopeinfo.ys PASS keep_hierarchy.ys PASS retention.lib PASS lcov.ys PASS sync_trans_old_none PASS logger_error.ys PASS logger_nowarning.ys PASS xprop_modfloor_5s3_3 PASS logger_warn.ys PASS logger_warning.ys PASS logic_param_simple.ys PASS mem2reg.ys PASS semicolextra.lib PASS uut_00021.ys PASS sync_trans_new_old PASS cxxrtl_always_comb PASS memory_word_as_index.ys PASS uut_00023.ys PASS xilinx_dsp.ys PASS semicolmissing.lib PASS sync_trans_new_new PASS uut_00046.ys PASS dynslice.v PASS unquoted.lib PASS xprop_lt_5u3_2 PASS libcache.ys PASS sync_trans_new_none PASS options_test.ys PASS read_liberty.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/liberty' ...passed tests in ./liberty PASS sp_nc_none PASS xprop_lt_5s3_2 PASS func_block.v PASS uut_00026.ys PASS code_hdl_models_up_counter.v PASS module_end_label.ys PASS uut_00047.ys PASS sp_new_none PASS xilinx_srl.ys PASS uut_00048.ys PASS uut_00040.ys PASS uut_00049.ys PASS uut_00050.ys PASS forgen01.v PASS uut_00051.ys PASS sp_old_none PASS code_hdl_models_uart.v make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/memories' PASS uut_00052.ys PASS uut_00053.ys PASS uut_00054.ys PASS uut_00055.ys PASS sp_nc_nc PASS muxpack.ys PASS forgen02.v PASS uut_00056.ys PASS code_hdl_models_up_counter_load.v PASS xprop_le_5u3_2 PASS cxxrtl_unconnected_output PASS uut_00058.ys PASS uut_00057.ys PASS muxcover.ys PASS muxpack_wide_y.ys PASS param_struct.ys PASS uut_00059.ys PASS xprop_le_5s3_2 PASS sp_new_nc PASS uut_00060.ys PASS func_recurse.v PASS display_lm PASS uut_00061.ys PASS peepopt.ys PASS uut_00025.ys PASS peepopt_formal.ys PASS uut_00062.ys PASS code_hdl_models_up_down_counter.v PASS sp_nc_new PASS dynslice.v PASS implicit_en.v PASS sp_old_nc PASS cxxrtl_always_full PASS always_full_equiv make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/fmt' ...passed tests in ./fmt PASS latches.ys PASS sp_new_new PASS net_types.ys PASS genblk_collide.v PASS uut_00027.ys PASS firrtl_938.v PASS forloops.v PASS sp_old_new PASS mul_unsigned.ys PASS code_specman_switch_fabric.v PASS func_width_scope.v PASS sp_nc_old PASS sp_new_old PASS code_tidbits_asyn_reset.v PASS genblk_dive.v PASS xilinx_dffopt.ys PASS sp_old_old PASS xprop_eq_5u3_2 PASS genblk_order.v PASS xprop_eq_5s3_2 PASS xprop_ne_5u3_2 PASS sp_nc_new_only PASS sp_new_new_only PASS fsm.v PASS code_tidbits_blocking.v PASS xprop_ne_5s3_2 PASS genblk_port_shadow.v PASS sp_nc_new_only_be PASS func_block.v PASS sp_old_new_only PASS code_tidbits_fsm_using_always.v PASS code_tidbits_nonblocking.v PASS issue00335.v PASS code_tidbits_reg_combo_example.v PASS sp_new_new_only_be PASS code_tidbits_fsm_using_function.v PASS pmux2shiftx.ys PASS code_tidbits_fsm_using_single_always.v PASS port_sign_extend.ys PASS sp_nc_new_be make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/aiger' PASS func_recurse.v PASS and_.aag PASS sp_old_new_only_be PASS and_to_bad_out.aag PASS graphtest.v PASS code_tidbits_reg_seq_example.v PASS buffer.aag PASS xprop_eqx_5u3_2 PASS cnt1.aag PASS sp_new_new_be PASS cnt1e.aag PASS empty.aag PASS code_tidbits_syn_reset.v PASS tribuf.ys PASS false.aag PASS uut_00065.ys PASS sp_old_new_be PASS primitives.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/alumacc' PASS no_implicit_en.v PASS halfadder.aag PASS shifter.ys PASS macc_infer_n_unmap.ys PASS inverter.aag PASS macc_b_port_compat.ys PASS amber23_sram_byte_en.v PASS notcnt1.aag PASS notcnt1e.aag PASS sp_nc_old_be PASS code_tidbits_wire_example.v PASS or_.aag PASS genblk_collide.v PASS basic.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/alumacc' ...passed tests in ./alumacc PASS symbols.aag PASS sp_new_old_be PASS sp_old_old_be PASS xprop_eqx_5s3_2 PASS mux_lut4.ys PASS printattr.ys PASS toggle-re.aag PASS xprop_nex_5u3_2 PASS uut_00066.ys PASS uut_00067.ys PASS uut_00068.ys All Makefiles generated. make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/anlogic' PASS toggle.aag PASS func_width_scope.v PASS hierarchy.v PASS true.aag PASS io.ys PASS code_verilog_tutorial_always_example.v PASS sp_nc_nc_be PASS neg.ys PASS genblk_dive.v PASS xprop_nex_5s3_2 PASS aigmap make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/aiger' ...passed tests in ./aiger PASS uut_00029.ys PASS issue00710.v PASS package_end_label.ys PASS genblk_order.v PASS code_verilog_tutorial_addbit.v PASS sp_new_nc_be PASS rand_const.ys PASS dffs.ys PASS xprop_ge_5u3_2 PASS uut_00069.ys PASS sp_old_nc_be PASS genblk_port_shadow.v PASS code_verilog_tutorial_bus_con.v PASS sp_nc_auto PASS hierdefparam.v PASS uut_00070.ys PASS add_sub.ys PASS uut_00028.ys PASS sp_new_auto PASS counter.ys PASS sp_old_auto PASS reg_wire_error.ys PASS sp_nc_auto_be PASS code_verilog_tutorial_comment.v PASS xprop_ge_5s3_2 PASS sp_old_auto_be PASS sp_new_auto_be PASS rename_scramble_name.ys PASS code_verilog_tutorial_counter.v PASS code_verilog_tutorial_counter_tb.v PASS xprop_gt_5u3_2 PASS sp_init_x_x PASS ifdef_1.v PASS uut_00071.ys PASS i2c_master_tests.v PASS pmgen_reduce.ys PASS code_verilog_tutorial_d_ff.v PASS rename_unescape.ys PASS rename_wire_move_to_cell.ys PASS rtlil_signed_attribute.ys PASS sp_init_x_x_re PASS rtlil_z_bits.ys PASS sp_init_x_x_ce PASS scopeinfo.ys PASS scratchpad.ys PASS script.ys PASS setundef.ys PASS setundef_selection.ys PASS sformatf.ys PASS dffs.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/ecp5' PASS sp_init_0_x PASS fsm.ys PASS xprop_gt_5s3_2 PASS shregmap.ys PASS signed.ys PASS signext.ys PASS sim_const.ys PASS code_verilog_tutorial_decoder.v PASS specify.ys PASS splitnets.ys PASS src.ys PASS read_two_mux.v PASS sp_init_0_x_re PASS graphtest.v PASS sta.ys PASS dsp.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/microchip' ...passed tests in ./arch/microchip PASS package_import_separate.ys PASS sp_init_0_0 PASS stat.ys PASS read_arst.v PASS stat_hierarchy.ys PASS stat_high_level.ys PASS stat_high_level2.ys PASS struct_access.ys PASS logic.ys PASS submod.ys PASS submod_extract.ys PASS sp_init_0_0_re PASS sv_defines_dup.ys PASS sv_defines.ys PASS sv_defines_mismatch.ys PASS code_verilog_tutorial_decoder_always.v PASS sv_defines_too_few.ys PASS sp_init_0_any PASS tcl_apis.ys PASS uut_00031.ys PASS xprop_reduce_and_3u_3 PASS wrapcell.ys PASS wreduce.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/efinix' PASS xprop_reduce_and_3s_3 PASS sp_init_0_any_re PASS code_verilog_tutorial_escape_id.v PASS add_sub.ys PASS add_sub.ys PASS sp_init_v_x PASS lutram.ys PASS timeest.ys PASS wreduce2.ys PASS shared_ports.v PASS write_gzip.ys PASS xaiger.ys PASS bug1630.ys PASS package_import_specific.ys PASS bug1459.ys PASS adffs.ys PASS sp_init_v_x_re PASS code_verilog_tutorial_explicit.v PASS ifdef_2.v PASS counter.ys PASS dffs.ys PASS uut_00032.ys PASS xprop_reduce_xor_3u_3 PASS uut_00072.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/fabulous' PASS xprop_reduce_or_3s_3 PASS xprop_reduce_or_3u_3 PASS sp_init_v_0 PASS code_verilog_tutorial_first_counter.v PASS code_verilog_tutorial_first_counter_tb.v PASS bug1598.ys PASS sp_init_v_0_re PASS complexflop.ys PASS async.sh PASS carry.ys PASS chparam.sh PASS hierarchy.v PASS sp_init_v_any PASS latches.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/gatemate' PASS clk2fflogic_effects.sh make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/gowin' PASS fsm.ys PASS uut_00030.ys PASS simple_sram_byte_en.v PASS counter.ys PASS code_verilog_tutorial_flip_flop.v PASS sp_init_v_any_re PASS customisation.ys PASS xprop_reduce_xor_3s_3 PASS sp_arst_x_x PASS uut_00033.ys PASS code_verilog_tutorial_fsm_full.v PASS code_verilog_tutorial_fsm_full_tb.v PASS sp_arst_x_x_re PASS latches.ys PASS shifter.ys PASS uut_00063.ys PASS nosrl.ys PASS sp_arst_0_x PASS code_verilog_tutorial_good_code.v PASS fsm.ys PASS logic.ys PASS uut_00064.ys PASS add_sub.ys PASS uut_00073.ys PASS logic.ys PASS uut_00074.ys PASS lutram.ys PASS uut_00075.ys PASS xprop_reduce_xnor_3u_3 PASS sp_arst_0_x_re PASS uut_00076.ys PASS code_verilog_tutorial_if_else.v PASS adffs.ys PASS regfile.ys PASS mux.ys PASS sp_arst_0_0_re PASS sp_arst_0_0 PASS hierarchy.sh PASS xprop_reduce_xnor_3s_3 PASS code_verilog_tutorial_multiply.v PASS sp_arst_0_any_re PASS sp_arst_0_any PASS trans_addr_enable.v PASS tribuf.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/fabulous' ...passed tests in ./arch/fabulous PASS uut_00035.ys PASS code_verilog_tutorial_mux_21.v PASS uut_00077.ys PASS sp_arst_0_init PASS uut_00078.ys PASS uut_00079.ys PASS local_loop_var.sv PASS uut_00080.ys PASS uut_00081.ys PASS lesser_size_cast.sv PASS mux.ys PASS sp_arst_0_init_re PASS uut_00082.ys PASS uut_00083.ys PASS code_verilog_tutorial_n_out_primitive.v PASS uut_00084.ys PASS uut_00085.ys PASS shifter.ys PASS implicit_ports.sv PASS uut_00086.ys PASS xprop_reduce_bool_1u_1 PASS sp_arst_v_x PASS uut_00034.ys PASS uut_00087.ys PASS uut_00088.ys PASS add_sub.ys PASS uut_00089.ys PASS code_verilog_tutorial_parallel_if.v PASS tribuf.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/efinix' ...passed tests in ./arch/efinix PASS dffs.ys PASS uut_00090.ys PASS blockram.ys PASS uut_00036.ys PASS uut_00091.ys PASS tribuf.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/anlogic' ...passed tests in ./arch/anlogic PASS sp_arst_v_x_re PASS uut_00092.ys PASS uut_00093.ys PASS uut_00094.ys PASS code_verilog_tutorial_parity.v PASS uut_00095.ys PASS counter.ys PASS uut_00037.ys PASS uut_00097.ys PASS ifdef_1.v PASS sp_arst_v_0 PASS adffs.ys PASS ezcmdline_plugin.sh PASS package_task_func.ys PASS param_default.ys PASS logger_cmd_error.sh PASS code_verilog_tutorial_simple_function.v PASS logger_fail.sh PASS xprop_reduce_bool_3u_3 PASS sp_arst_v_0_re PASS code_verilog_tutorial_simple_if.v PASS i2c_master_tests.v PASS sp_arst_v_any PASS hierdefparam.v PASS sv_implicit_ports.sh PASS uut_00096.ys PASS uut_00098.ys PASS xprop_reduce_bool_3s_3 PASS code_verilog_tutorial_task_global.v PASS bug2731.ys make[2]: Entering directory '/home/buildozer/aports/testing/yosys/src/tests/arch/intel_alm' PASS uut_00099.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/opt_share' ...passed tests in ./opt_share PASS sp_arst_v_any_re PASS ifdef_2.v PASS sp_arst_v_init PASS bug2409.ys PASS svalways.sh PASS trans_sdp.v PASS bug1836.ys PASS uut_00038.ys PASS code_verilog_tutorial_tri_buf.v PASS sp_arst_v_init_re PASS uut_00039.ys PASS counter.ys PASS localparam_attr.v PASS xprop_reduce_bool_3s_1 PASS code_verilog_tutorial_v2k_reg.v PASS sp_arst_e_x PASS blockram.ys PASS param_no_default.ys PASS param_int_types.ys PASS xprop_logic_not_1u_1 PASS add_sub.ys PASS xprop_logic_not_3u_3 PASS xprop_logic_not_3s_3 PASS uut_00040.ys PASS sp_arst_e_x_re PASS counter.ys PASS dffs.ys PASS adffs.ys PASS code_verilog_tutorial_which_clock.v make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/asicworld' ...passed tests in ./asicworld PASS param_no_default_not_svmode.ys PASS sp_arst_e_0 PASS wide_all.v PASS trans_sp.v PASS fsm.ys PASS sp_arst_e_0_re PASS uut_00041.ys PASS sp_arst_e_any PASS adffs.ys PASS bug5688.ys PASS xprop_logic_not_3s_1 PASS fsm.ys PASS sp_arst_e_any_re PASS compare.ys PASS uut_00042.ys PASS loop_prefix_case.v PASS plugin.sh make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/various' ...passed tests in ./various PASS logic.ys PASS param_no_default_unbound_1.ys PASS param_no_default_unbound_2.ys PASS lesser_size_cast.sv PASS sp_arst_e_init PASS implicit_ports.sv PASS xprop_logic_and_1u1_1 PASS sp_arst_e_init_re PASS counter.ys PASS sp_arst_n_x PASS macc.sh PASS fsm.ys PASS fsm.ys PASS loop_var_shadow.v PASS sp_arst_n_x_re PASS dffs.ys PASS dffs.ys PASS uut_00045.ys PASS xprop_logic_and_3u3_3 PASS latches_abc9.ys PASS sp_arst_n_0 PASS local_loop_var.sv PASS localparam_attr.v PASS shifter.ys PASS sp_arst_n_0_re PASS logic.ys PASS sp_arst_n_any PASS init-error.ys PASS uut_00043.ys PASS abc9_dff.ys PASS param_no_default_unbound_3.ys PASS attributes_test.ys PASS uut_00047.ys PASS sp_arst_n_any_re PASS tribuf.ys PASS dpram.ys PASS uut_00048.ys PASS param_no_default_unbound_4.ys PASS sp_arst_n_init PASS adffs.ys PASS logic.ys PASS sp_arst_n_init_re PASS mul.ys PASS xprop_logic_and_3s3_3 PASS wide_read_async.v PASS loops.v PASS loop_prefix_case.v PASS dsp_cascade.ys PASS sp_srst_x_x PASS macro_arg_surrounding_spaces.v PASS loop_var_shadow.v PASS param_no_default_unbound_5.ys PASS mux.ys PASS sp_srst_x_x_re PASS latches.ys PASS logic.ys PASS xprop_logic_or_1u1_1 PASS generate.v PASS macros.v PASS xprop_logic_and_3s3_1 PASS latches.ys PASS sp_srst_0_x_re PASS sp_srst_0_x PASS latches.ys PASS macro_arg_spaces.sv PASS wide_read_mixed.v PASS macc.ys PASS xprop_logic_or_3u3_3 PASS wide_read_sync.v PASS sp_srst_0_0 PASS matching_end_labels.sv PASS xprop_logic_or_3s3_1 PASS xprop_logic_or_3s3_3 PASS parameters_across_files.ys PASS loops.v PASS uut_00046.ys PASS uut_00044.ys PASS sp_srst_0_0_re PASS mux.ys PASS func_upto.ys PASS macro_arg_surrounding_spaces.v PASS xprop_shl_4u3u_3 PASS past_signedness.ys PASS wide_read_trans.v PASS opt_lut_ins.ys PASS port_int_types.ys PASS lutram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/intel_alm' ...passed tests in ./arch/intel_alm PASS sp_srst_0_any PASS prefix.ys PASS macro_arg_spaces.sv PASS wide_thru_priority.v PASS xprop_shl_4s3u_3 PASS mem2reg_bounds_tern.v PASS priority_if_enc.ys PASS sp_srst_0_any_re PASS reset_auto_counter.ys PASS roundtrip_proc.ys PASS sbvector.ys PASS mul.ys PASS shifter.ys PASS sign_array_query.ys PASS specify-ifnone.ys PASS sp_srst_0_init PASS xprop_shr_4u3u_3 PASS matching_end_labels.sv PASS sp_srst_0_init_re PASS mem_arst.v PASS size_cast.ys PASS init.ys PASS string-literals.ys PASS rom.ys PASS sp_srst_v_x PASS mem2reg.v PASS macros.v PASS tribuf.ys PASS sp_srst_v_x_re PASS sp_srst_v_0 PASS sva-in-case-expr.ys PASS shifter.ys PASS struct_access.ys PASS tribuf.ys PASS task_attr.ys PASS sp_srst_v_0_re PASS uut_00049.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/fsm' ...passed tests in ./fsm PASS typedef_across_files.ys PASS typedef_const_shadow.ys PASS xprop_sshl_4u3u_3 PASS typedef_legacy_conflict.ys PASS shifter.ys PASS xprop_shr_4s3u_3 PASS unbased_unsized.ys PASS memwr_port_connection.sv PASS sp_srst_v_any PASS unbased_unsized_shift.ys PASS module_scope_case.v PASS module_scope_func.v PASS sp_srst_v_any_re PASS wide_write.v make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/memories' ...passed tests in ./memories PASS xprop_sshl_4s3u_3 PASS mem2reg_bounds_tern.v PASS memwr_port_connection.sv PASS tribuf.ys PASS sp_srst_v_any_re_gated PASS sp_srst_v_any_ce PASS mem_arst.v PASS module_scope.v PASS xprop_sshr_4u3u_3 PASS module_scope_case.v PASS unique0_if_enc.ys PASS unbased_unsized_tern.ys PASS unique_if.ys PASS unique_if_else.ys PASS module_scope.v PASS unique_if_else_begin.ys PASS sp_srst_v_any_ce_gated PASS module_scope_func.v PASS sp_srst_v_init PASS sp_srst_v_init_re PASS sp_srst_e_x PASS sp_srst_e_x_re PASS mem2reg.v PASS named_genblk.v PASS xprop_sshr_4s3u_3 PASS unique_if_enc.ys PASS muxtree.v PASS unique_priority_case.ys PASS sp_srst_e_0 PASS multiplier.v PASS unique_priority_if.ys PASS unmatched_else.ys PASS unmatched_elsif.ys PASS sp_srst_e_0_re PASS unmatched_endif.ys PASS unmatched_endif_2.ys PASS lutram.ys PASS tribuf.sh PASS sp_srst_e_any_re PASS sp_srst_e_any PASS unnamed_block.ys PASS xprop_shift_4s3u_3 PASS xprop_shift_4u3s_3 PASS mul.ys PASS unreachable_case_sign.ys PASS unnamed_genblk.ys PASS mux.ys PASS upto.ys PASS void_func.ys PASS sp_srst_e_init PASS wire_and_var.ys PASS nested_genblk_resolve.v PASS xprop_shiftx_4u3s_3 PASS named_genblk.v PASS nested_genblk_resolve.v PASS xprop_shift_4s2s_8 PASS mul_gw2a.ys PASS xprop_shift_4s3s_3 PASS asym_ram_sdp.ys PASS xprop_shiftx_4u2s_8 PASS xprop_shift_4u2s_8 PASS xprop_mux_1 PASS local_include.sh PASS xprop_shift_4u3u_3 PASS sp_srst_n_0 PASS sp_srst_e_init_re PASS sp_srst_n_x_re PASS sp_srst_n_x PASS omsp_dbg_uart.v PASS omsp_dbg_uart.v PASS muxtree.v PASS param_attr.v PASS param_attr.v PASS xprop_mux_3 PASS mul_gw1n.ys PASS sp_srst_n_0_re PASS sp_srst_n_any PASS sp_srst_n_any_re PASS sp_srst_n_init PASS realexpr.v PASS xprop_bmux_1_2 PASS xprop_bmux_3_1 PASS multiplier.v PASS sp_srst_n_init_re PASS xprop_bmux_2_2 PASS sp_srst_gv_x PASS process.v PASS mux.ys PASS paramods.v PASS ioff.ys PASS realexpr.v PASS repwhile.v PASS retime.v PASS sp_srst_gv_x_re PASS retime.v PASS mux.ys PASS paramods.v PASS repwhile.v PASS sp_srst_gv_0 PASS xprop_demux_1_2 PASS generate.v PASS sp_srst_gv_0_re PASS signed_full_slice.v PASS signed_full_slice.v PASS xprop_demux_2_2 PASS sp_srst_gv_any PASS xprop_pmux_1_4 PASS sp_srst_gv_any_re_gated PASS mux.ys PASS sp_srst_gv_any_re PASS signedexpr.v PASS scopes.v PASS sign_part_assign.v PASS string_format.v PASS scopes.v PASS xprop_demux_3_1 PASS string_format.v PASS process.v PASS memory.v PASS signedexpr.v PASS sign_part_assign.v PASS sp_srst_gv_any_ce PASS undef_eqx_nex.v PASS specify.v PASS sp_srst_gv_any_ce_gated PASS xprop_pmux_2_2 PASS sp_srst_gv_init PASS verilog_primitives.v PASS wren_a4d4_NO_BYTE PASS xprop_pmux_3_1 PASS usb_phy_tests.v PASS sp_srst_gv_init_re PASS wren_a5d4_NO_BYTE PASS unnamed_block_decl.sv PASS xprop_bwmux_1 PASS undef_eqx_nex.v PASS subbytes.v PASS xprop_bweqx_3 PASS pmgen_xilinx_srl.ys PASS wren_a3d8_NO_BYTE PASS unnamed_block_decl.sv PASS wren_a6d4_NO_BYTE PASS xprop_bweqx_1 PASS xprop_bwmux_3 PASS vloghammer.v PASS wandwor.v PASS wren_a4d8_NO_BYTE PASS xprop_pmux_4_4 PASS values.v PASS wren_a4d4_W4_B4 PASS subbytes.v PASS usb_phy_tests.v PASS wren_a4d8_W4_B4_separate PASS verilog_primitives.v PASS xprop_ff_1 PASS task_func.v PASS wren_a4d8_W8_B4_separate PASS rotate.v PASS wren_a4d8_W8_B4 PASS values.v PASS wren_a4d8_W8_B8 PASS wren_a4d8_W8_B8_separate PASS xprop_ff_3 PASS wren_a4d2w8_W16_B4 PASS sincos.v PASS xprop_dff_3pd PASS xprop_dff_1nd PASS xprop_dff_1pd PASS wren_a4d2w8_W16_B4_separate PASS wandwor.v PASS wren_a4d4w4_W16_B4_separate PASS xprop_dffe_1pnd PASS wren_a4d4w4_W16_B4 PASS task_func.v PASS xprop_dff_3nd PASS wren_a5d4w2_W16_B4 PASS wren_a5d4w2_W16_B4_separate PASS wren_a5d4w4_W16_B4 PASS wren_a4d8w2_W16_B4_separate PASS wren_a5d4w4_W16_B4_separate PASS wren_a5d8w1_W16_B4_separate PASS vloghammer.v PASS wren_a5d8w2_W16_B4 PASS wren_a5d8w1_W16_B4 PASS wren_a4d8w2_W16_B4 PASS wren_a4d16w1_W16_B4 PASS wren_a5d8w2_W16_B4_separate PASS rotate.v PASS xprop_dffe_1ppd PASS wren_a4d16w1_W16_B4_separate PASS xprop_dffe_1nnd PASS xprop_dffe_1npd PASS xprop_dffe_3pnd PASS xprop_dffe_3nnd PASS wren_a4d4w2_W8_B8_separate PASS wren_a4d4w2_W8_B8 PASS wren_a4d4w1_W8_B8_separate PASS wreduce.v PASS wren_a4d8w2_W8_B8 PASS wren_a4d8w2_W8_B8_separate PASS wren_a4d4w1_W8_B8 PASS wren_a3d8w2_W8_B8 PASS wren_a4d4w2_W8_B4_separate PASS wren_a4d4w2_W8_B4 PASS wren_a3d8w2_W8_B8_separate PASS wren_a4d2w4_W8_B4 PASS geom_a6d16_wren PASS wren_a4d4w4_W8_B4_separate PASS geom_a5d64_wren PASS wren_a4d2w4_W8_B4_separate PASS geom_a4d64_wren PASS wren_a4d4w4_W8_B4 PASS wren_a4d4w4_W4_B4 PASS wren_a4d4w5_W4_B4 PASS geom_a6d30_wren PASS xprop_dffe_3npd PASS geom_a5d32_wren PASS wreduce.v PASS wren_a4d4w5_W4_B4_separate PASS wren_a4d4w4_W4_B4_separate PASS geom_a7d6_wren PASS geom_a6d64_wren PASS geom_a7d17_wren PASS geom_a4d4_9b1B PASS geom_a7d4_wren PASS geom_a7d8_wren PASS geom_a3d18_9b1B PASS geom_a8d4_wren PASS geom_a4d18_9b1B PASS geom_a6d4_9b1B PASS geom_a7d11_9b1B PASS geom_a8d6_wren PASS geom_a5d32_9b1B PASS geom_a9d5_wren PASS wide_sdp_a7r1w1b1x1 PASS xprop_dffe_3ppd make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/xprop' PASS geom_a9d8_wren ...passed tests in ./xprop PASS wide_sdp_a6r1w1b1x1 PASS geom_a11d1_9b1B PASS geom_a9d6_wren PASS wide_sdp_a6r0w0b0x0 PASS geom_a9d4_wren PASS wide_sdp_a6r2w0b0x0 PASS wide_sdp_a6r0w1b1x0 PASS wide_sdp_a8r1w1b1x1 PASS wide_sdp_a6r0w1b0x0 PASS geom_a7d18_9b1B PASS wide_sdp_a6r0w2b0x0 PASS wide_sdp_a6r1w0b0x0 PASS wide_sdp_a6r3w0b0x0 PASS wide_sdp_a7r1w0b0x0 PASS wide_sdp_a7r3w0b0x0 PASS wide_sdp_a6r0w3b2x0 PASS wide_sdp_a7r5w0b0x0 PASS wide_sdp_a6r0w2b2x0 PASS wide_sdp_a7r0w0b0x0 PASS wide_sdp_a7r4w0b0x0 PASS wide_sdp_a6r0w4b2x0 PASS wide_sdp_a6r5w0b0x0 PASS wide_sdp_a6r4w0b0x0 PASS wide_sdp_a7r2w0b0x0 PASS sincos.v PASS wide_sdp_a7r0w1b1x0 PASS wide_sp_mix_a6r1w1b1 PASS wide_sdp_a7r0w2b2x0 PASS wide_sdp_a7r0w2b0x0 PASS wide_sdp_a7r0w1b0x0 PASS wide_sp_mix_a7r1w1b1 PASS wide_sp_mix_a6r0w0b0 PASS wide_sdp_a7r0w4b2x0 PASS wide_sp_mix_a6r2w0b0 PASS wide_sp_mix_a8r1w1b1 PASS wide_sdp_a6r0w5b2x0 PASS wide_sdp_a7r0w3b2x0 PASS wide_sp_mix_a6r0w1b1 PASS wide_sp_mix_a6r5w0b0 PASS wide_sp_mix_a6r4w0b0 PASS wide_sp_mix_a6r1w0b0 PASS wide_sdp_a7r0w5b2x0 PASS wide_sp_mix_a6r3w0b0 PASS wide_sp_mix_a6r0w3b2 PASS wide_sp_mix_a6r0w2b0 PASS wide_sp_mix_a7r4w0b0 PASS wide_sp_mix_a6r0w1b0 PASS wide_sp_mix_a6r0w2b2 PASS wide_sp_mix_a6r0w4b2 PASS wide_sp_mix_a7r0w1b0 PASS wide_sp_mix_a7r3w0b0 PASS wide_sp_mix_a7r0w2b2 PASS wide_sp_mix_a7r0w2b0 PASS wide_sp_mix_a7r5w0b0 PASS wide_sp_tied_a6r0w0b0 PASS wide_sp_mix_a7r1w0b0 PASS wide_sp_mix_a7r0w4b2 PASS wide_sp_tied_a7r1w1b1 PASS wide_sp_mix_a7r2w0b0 PASS wide_sp_mix_a7r0w0b0 PASS wide_sp_tied_a8r1w1b1 PASS wide_sp_mix_a7r0w1b1 PASS wide_sp_mix_a7r0w3b2 PASS wide_sp_tied_a6r1w1b1 PASS wide_sp_mix_a6r0w5b2 PASS wide_sp_tied_a6r4w0b0 PASS wide_sp_tied_a6r0w1b1 PASS wide_sp_tied_a6r2w0b0 PASS wide_sp_tied_a6r3w0b0 PASS wide_sp_tied_a6r0w2b0 PASS wide_sp_tied_a6r1w0b0 PASS wide_sp_tied_a7r1w0b0 PASS wide_sp_tied_a6r0w2b2 PASS wide_sp_mix_a7r0w5b2 PASS cxxrtl_value_fuzz make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/cxxrtl' PASS wide_sp_tied_a6r0w1b0 PASS wide_sp_tied_a6r0w3b2 PASS wide_sp_tied_a7r0w0b0 ...passed tests in ./cxxrtl PASS wide_sp_tied_a7r0w1b1 PASS wide_sp_tied_a6r0w4b2 PASS wide_sp_tied_a6r5w0b0 PASS wide_sp_tied_a7r3w0b0 PASS wide_sp_tied_a7r0w2b2 PASS wide_sp_tied_a7r0w2b0 PASS meminit.ys PASS wide_sp_tied_a7r0w1b0 PASS wide_write_a7r1w1b1 PASS wide_write_a6r1w1b1 PASS wide_read_a8r1w1b1 PASS wide_sp_tied_a7r0w3b2 PASS wide_sp_tied_a7r4w0b0 PASS wide_read_a6r1w0b0 PASS wide_sp_tied_a6r0w5b2 PASS wide_sp_tied_a7r0w4b2 PASS wide_write_a6r0w0b0 PASS wide_write_a8r1w1b1 PASS wide_read_a6r1w1b1 PASS wide_write_a6r2w0b0 PASS wide_read_a6r0w0b0 PASS wide_read_a7r1w1b1 PASS wide_sp_tied_a7r2w0b0 PASS wide_read_a6r3w0b0 PASS wide_sp_tied_a7r5w0b0 PASS wide_read_a6r2w0b0 PASS wide_sp_tied_a7r0w5b2 PASS wide_read_a6r0w1b1 PASS wide_write_a6r1w0b0 PASS wide_read_a6r0w2b2 PASS wide_read_a6r0w1b0 PASS wide_read_a6r5w0b0 PASS wide_read_a6r0w2b0 PASS wide_write_a6r0w1b0 PASS wide_write_a6r0w2b2 PASS wide_write_a6r0w1b1 PASS wide_write_a6r0w3b2 PASS wide_write_a6r0w2b0 PASS wide_write_a6r3w0b0 PASS wide_read_a7r1w0b0 PASS wide_write_a7r0w0b0 PASS wide_write_a6r0w4b2 PASS wide_read_a6r0w3b2 PASS wide_read_a7r0w0b0 PASS wide_read_a7r0w1b0 PASS wide_read_a7r4w0b0 PASS wide_read_a6r0w4b2 PASS wide_write_a6r0w5b2 PASS wide_read_a7r2w0b0 PASS wide_write_a7r1w0b0 PASS wide_read_a7r3w0b0 PASS wide_read_a7r0w1b1 PASS wide_read_a6r0w5b2 PASS wide_write_a7r3w0b0 PASS wide_read_a7r5w0b0 PASS wide_write_a7r0w1b0 PASS wide_read_a7r0w2b0 PASS wide_write_a7r0w3b2 PASS wide_write_a6r5w0b0 PASS wide_read_a7r0w2b2 PASS wide_read_a6r4w0b0 PASS wide_write_a7r2w0b0 PASS wide_write_a7r0w2b2 PASS wide_write_a7r0w1b1 PASS quad_port_a2d2 PASS wide_read_a7r0w3b2 PASS wide_write_a7r0w2b0 PASS quad_port_a5d2 PASS wide_quad_a4w2r1 PASS quad_port_a4d2 PASS wide_write_a7r0w4b2 PASS quad_port_a4d8 PASS wide_oct_a4w2r1 PASS wide_write_a7r4w0b0 PASS wide_write_a7r5w0b0 PASS operators.v PASS wide_oct_a4w2r2 PASS wide_read_a7r0w4b2 PASS wide_oct_a4w2r3 PASS wide_quad_a4w2r2 PASS wide_write_a6r4w0b0 PASS wide_oct_a4w2r5 PASS wide_write_a7r0w5b2 PASS wide_quad_a4w2r4 PASS wide_oct_a4w2r6 PASS quad_port_a4d4 PASS wide_quad_a4w2r3 PASS wide_quad_a4w2r6 PASS wide_quad_a4w4r1 PASS wide_quad_a4w2r7 PASS quad_port_a6d2 PASS wide_oct_a4w2r4 PASS wide_quad_a4w4r4 PASS wide_read_a7r0w5b2 PASS wide_oct_a4w4r1 PASS wide_quad_a4w2r8 PASS memory.v PASS wide_quad_a4w4r6 PASS wide_quad_a4w2r9 PASS wide_oct_a4w2r7 PASS wide_quad_a4w2r5 PASS wide_oct_a4w2r8 PASS wide_oct_a4w2r9 PASS wide_oct_a4w4r4 PASS wide_quad_a4w4r9 PASS wide_quad_a5w2r1 PASS wide_quad_a5w2r4 PASS wide_oct_a5w2r1 PASS wide_oct_a4w4r9 PASS gclken PASS rom_case PASS wide_oct_a5w2r4 PASS wide_oct_a4w4r6 PASS wr_rst_byte PASS gclken_ce PASS rom_case_block PASS wide_oct_a5w2r9 PASS wr_byte PASS excl_rst PASS no_reset PASS transwr PASS exclwr PASS trans_byte PASS wide_quad_a5w2r9 PASS grden_ce PASS trans_rst PASS rst_wr_byte PASS grden PASS rdenrst_wr_byte PASS ungated make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/memlib' ...passed tests in ./memlib PASS operators.v PASS memory.ys PASS dsp_preadder_sub.ys PASS partsel.v make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/simple' ...passed tests in ./simple PASS lutram.ys PASS lutram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/gowin' ...passed tests in ./arch/gowin PASS lutram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/nanoxplore' ...passed tests in ./arch/nanoxplore PASS priority_memory.ys PASS luttrees.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/gatemate' ...passed tests in ./arch/gatemate PASS memories.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/ice40' ...passed tests in ./arch/ice40 PASS blockram.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/xilinx' ...passed tests in ./arch/xilinx PASS dynamic_range_lhs.sh make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/verilog' ...passed tests in ./verilog PASS partsel.v make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/simple_abc9' ...passed tests in ./simple_abc9 PASS t_mem2.ys PASS t_mem1.ys PASS t_mem5.ys PASS t_mem3.ys PASS t_mem4.ys PASS t_mem6.ys PASS t_mem0.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/quicklogic/qlf_k6n10f' ...passed tests in ./arch/quicklogic/qlf_k6n10f PASS memories.ys make[2]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests/arch/ecp5' ...passed tests in ./arch/ecp5 Passed "make vanilla-test". ========================== Tests: 2179 Passed: 2179 Failed: 0 ========================== make[1]: Leaving directory '/home/buildozer/aports/testing/yosys/src/tests' >>> yosys: Entering fakeroot... [Makefile.conf] CONFIG:=gcc [Makefile.conf] PREFIX:=/usr [Makefile.conf] ABCEXTERNAL:=/usr/bin/abc [Makefile.conf] ENABLE_ABC:=1 [Makefile.conf] ENABLE_LIBYOSYS:=1 [Makefile.conf] ENABLE_NDEBUG:=1 [Makefile.conf] ENABLE_PROTOBUF:=1 [Makefile.conf] ENABLE_PYOSYS:=1 [Makefile.conf] PYOSYS_USE_UV:=0 mkdir -p /home/buildozer/aports/testing/yosys/pkg/yosys/usr/bin cp yosys yosys-config yosys-filterlib yosys-smtbmc yosys-witness /home/buildozer/aports/testing/yosys/pkg/yosys/usr/bin if [ -n "strip" ]; then strip -S /home/buildozer/aports/testing/yosys/pkg/yosys/usr/bin/yosys; fi if [ -n "strip" ]; then strip /home/buildozer/aports/testing/yosys/pkg/yosys/usr/bin/yosys-filterlib; fi mkdir -p /home/buildozer/aports/testing/yosys/pkg/yosys/usr/share/yosys cp -r share/. /home/buildozer/aports/testing/yosys/pkg/yosys/usr/share/yosys/. mkdir -p /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/yosys cp libyosys.so /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/yosys/ if [ -n "strip" ]; then strip -S /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/yosys/libyosys.so; fi mkdir -p /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/python3.14/site-packages/pyosys cp .//pyosys/__init__.py /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/python3.14/site-packages/pyosys/__init__.py cp libyosys.so /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/python3.14/site-packages/pyosys/libyosys.so cp -r share /home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/python3.14/site-packages/pyosys '/home/buildozer/aports/testing/yosys/pkg/yosys/usr/lib/python3.14/site-packages/pyosys/libyosys.so' -> '/usr/lib/yosys/libyosys.so' >>> yosys-dev*: Running split function dev... 'usr/bin/yosys-config' -> '/home/buildozer/aports/testing/yosys/pkg/yosys-dev/usr/bin/yosys-config' './usr/lib/python3.14/site-packages/pyosys/share/include' -> '/home/buildozer/aports/testing/yosys/pkg/yosys-dev/./usr/lib/python3.14/site-packages/pyosys/share/include' './usr/share/yosys/include' -> '/home/buildozer/aports/testing/yosys/pkg/yosys-dev/./usr/share/yosys/include' >>> yosys-dev*: Preparing subpackage yosys-dev... >>> yosys-dev*: Stripping binaries >>> yosys-dev*: Running postcheck for yosys-dev >>> py3-yosys*: Running split function py3... 'usr/lib/python3.14' -> '/home/buildozer/aports/testing/yosys/pkg/py3-yosys/usr/lib/python3.14' >>> py3-yosys*: Preparing subpackage py3-yosys... >>> py3-yosys*: Running postcheck for py3-yosys >>> yosys*: Running postcheck for yosys >>> yosys*: Preparing package yosys... >>> yosys*: Stripping binaries >>> yosys*: Scanning shared objects >>> yosys-dev*: Scanning shared objects >>> yosys*: Tracing dependencies... abc so:libc.musl-x86.so.1 so:libffi.so.8 so:libgcc_s.so.1 so:libpython3.14.so.1.0 so:libreadline.so.8 so:libstdc++.so.6 so:libtcl8.6.so so:libz.so.1 >>> yosys*: Package size: 92.3 MB >>> yosys*: Compressing data... >>> yosys*: Create checksum... >>> yosys*: Create yosys-0.66-r0.apk >>> yosys-dev*: Tracing dependencies... python3~3.14 >>> yosys-dev*: Package size: 1.3 MB >>> yosys-dev*: Compressing data... >>> yosys-dev*: Create checksum... >>> yosys-dev*: Create yosys-dev-0.66-r0.apk >>> py3-yosys*: Tracing dependencies... python3 yosys=0.66-r0 python3~3.14 yosys=0.66-r0 >>> py3-yosys*: Package size: 9.2 MB >>> py3-yosys*: Compressing data... >>> py3-yosys*: Create checksum... >>> py3-yosys*: Create py3-yosys-0.66-r0.apk >>> yosys: Build complete at Wed, 15 Jul 2026 03:38:03 +0000 elapsed time 0h 15m 16s >>> yosys: Cleaning up srcdir >>> yosys: Cleaning up pkgdir >>> yosys: Cleaning up tmpdir >>> yosys: Uninstalling dependencies... ( 1/368) Purging .makedepends-yosys (20260715.032248) ( 2/368) Purging abc (0_git20260515-r0) ( 3/368) Purging bash (5.3.9-r1) Executing bash-5.3.9-r1.pre-deinstall ( 4/368) Purging bison (3.8.2-r3) ( 5/368) Purging boost-dev (1.84.0-r6) ( 6/368) Purging boost1.84-dev (1.84.0-r6) ( 7/368) Purging boost1.84 (1.84.0-r6) ( 8/368) Purging xz-dev (5.8.3-r0) ( 9/368) Purging boost1.84-libs (1.84.0-r6) ( 10/368) Purging boost1.84-atomic (1.84.0-r6) ( 11/368) Purging boost1.84-chrono (1.84.0-r6) ( 12/368) Purging boost1.84-container (1.84.0-r6) ( 13/368) Purging boost1.84-contract (1.84.0-r6) ( 14/368) Purging boost1.84-coroutine (1.84.0-r6) ( 15/368) Purging boost1.84-date_time (1.84.0-r6) ( 16/368) Purging boost1.84-fiber (1.84.0-r6) ( 17/368) Purging boost1.84-graph (1.84.0-r6) ( 18/368) Purging boost1.84-iostreams (1.84.0-r6) ( 19/368) Purging boost1.84-json (1.84.0-r6) ( 20/368) Purging boost1.84-locale (1.84.0-r6) ( 21/368) Purging boost1.84-log_setup (1.84.0-r6) ( 22/368) Purging boost1.84-math (1.84.0-r6) ( 23/368) Purging boost1.84-nowide (1.84.0-r6) ( 24/368) Purging boost1.84-prg_exec_monitor (1.84.0-r6) ( 25/368) Purging boost1.84-program_options (1.84.0-r6) ( 26/368) Purging boost1.84-python3 (1.84.0-r6) ( 27/368) Purging boost1.84-random (1.84.0-r6) ( 28/368) Purging boost1.84-regex (1.84.0-r6) ( 29/368) Purging boost1.84-stacktrace_basic (1.84.0-r6) ( 30/368) Purging boost1.84-stacktrace_noop (1.84.0-r6) ( 31/368) Purging boost1.84-system (1.84.0-r6) ( 32/368) Purging boost1.84-timer (1.84.0-r6) ( 33/368) Purging boost1.84-type_erasure (1.84.0-r6) ( 34/368) Purging boost1.84-unit_test_framework (1.84.0-r6) ( 35/368) Purging boost1.84-url (1.84.0-r6) ( 36/368) Purging boost1.84-wave (1.84.0-r6) ( 37/368) Purging boost1.84-wserialization (1.84.0-r6) ( 38/368) Purging flex-dev (2.6.4-r8) ( 39/368) Purging flex (2.6.4-r8) ( 40/368) Purging m4 (1.4.21-r0) ( 41/368) Purging flex-libs (2.6.4-r8) ( 42/368) Purging gawk (5.3.2-r2) ( 43/368) Purging graphviz-dev (12.2.1-r3) ( 44/368) Purging gd-dev (2.3.3-r10) ( 45/368) Purging gd (2.3.3-r10) ( 46/368) Purging libgd (2.3.3-r10) ( 47/368) Purging gmp-dev (6.3.0-r4) ( 48/368) Purging libgmpxx (6.3.0-r4) ( 49/368) Purging libsm-dev (1.2.6-r0) ( 50/368) Purging pango-dev (1.57.1-r0) ( 51/368) Purging pango-tools (1.57.1-r0) ( 52/368) Purging python3-dev (3.14.5-r2) ( 53/368) Purging graphviz-libs (12.2.1-r3) ( 54/368) Purging protobuf-dev (31.1-r2) ( 55/368) Purging abseil-cpp-dev (20260526.0-r0) ( 56/368) Purging abseil-cpp-civil-time (20260526.0-r0) ( 57/368) Purging abseil-cpp-cordz-sample-token (20260526.0-r0) ( 58/368) Purging abseil-cpp-crc-cpu-detect (20260526.0-r0) ( 59/368) Purging abseil-cpp-demangle-internal (20260526.0-r0) ( 60/368) Purging abseil-cpp-demangle-rust (20260526.0-r0) ( 61/368) Purging abseil-cpp-exception-safety-testing (20260526.0-r0) ( 62/368) Purging abseil-cpp-failure-signal-handler (20260526.0-r0) ( 63/368) Purging abseil-cpp-flags-parse (20260526.0-r0) ( 64/368) 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py3-parsing (3.3.2-r1) (273/368) Purging pcre2-dev (10.47-r1) (274/368) Purging libpcre2-16 (10.47-r1) (275/368) Purging libpcre2-32 (10.47-r1) (276/368) Purging libedit-dev (20260508.3.1-r1) (277/368) Purging ncurses-dev (6.6_p20260516-r0) (278/368) Purging libncurses++ (6.6_p20260516-r0) (279/368) Purging bsd-compat-headers (0.7.2-r6) (280/368) Purging gdk-pixbuf (2.44.7-r1) Executing gdk-pixbuf-2.44.7-r1.pre-deinstall (281/368) Purging shared-mime-info (2.4-r7) Executing shared-mime-info-2.4-r7.post-deinstall (282/368) Purging libglycin (2.1.5-r0) (283/368) Purging bubblewrap (0.11.2-r0) (284/368) Purging dav1d-dev (1.5.3-r0) (285/368) Purging libdav1d (1.5.3-r0) (286/368) Purging dbus-libs (1.16.2-r2) (287/368) Purging expat-dev (2.8.2-r0) (288/368) Purging expat (2.8.2-r0) (289/368) Purging libxft (2.3.9-r0) (290/368) Purging fontconfig (2.18.1-r0) (291/368) Purging harfbuzz (14.2.1-r0) (292/368) Purging freetype (2.14.3-r0) (293/368) Purging fribidi (1.0.16-r3) (294/368) Purging gettext-libs (1.0-r0) (295/368) Purging libatk-1.0 (2.60.5-r0) (296/368) Purging glib (2.88.2-r0) (297/368) Purging gnutls (3.8.13-r0) (298/368) Purging graphite2 (1.3.15-r0) (299/368) Purging icu (78.1-r0) (300/368) Purging icu-libs (78.1-r0) (301/368) Purging icu-data-en (78.1-r0) (302/368) Purging lcms2 (2.19-r0) (303/368) Purging util-linux-dev (2.42.2-r0) (304/368) Purging libfdisk (2.42.2-r0) (305/368) Purging liblastlog2 (2.42.2-r0) (306/368) Purging libmount (2.42.2-r0) (307/368) Purging libsmartcols (2.42.2-r0) (308/368) Purging libblkid (2.42.2-r0) (309/368) Purging libxrender-dev (0.9.12-r0) (310/368) Purging libxrender (0.9.12-r0) (311/368) Purging libxext-dev (1.3.7-r0) (312/368) Purging libx11-dev (1.8.13-r0) (313/368) Purging xtrans (1.6.0-r0) (314/368) Purging libxcb-dev (1.17.0-r2) (315/368) Purging xcb-proto (1.17.0-r1) (316/368) Purging python3 (3.14.5-r2) (317/368) Purging libxdmcp-dev (1.1.5-r1) (318/368) Purging libxi (1.8.3-r0) (319/368) Purging libxext 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(1.6.0-r0) (345/368) Purging libwebpdecoder (1.6.0-r0) (346/368) Purging libwebpdemux (1.6.0-r0) (347/368) Purging libwebpmux (1.6.0-r0) (348/368) Purging libwebp (1.6.0-r0) (349/368) Purging libsharpyuv (1.6.0-r0) (350/368) Purging libtasn1 (4.21.0-r0) (351/368) Purging libuuid (2.42.2-r0) (352/368) Purging libxau-dev (1.0.12-r0) (353/368) Purging libxau (1.0.12-r0) (354/368) Purging libxml2 (2.13.9-r2) (355/368) Purging linux-pam (1.7.1-r2) (356/368) Purging mpdecimal (4.0.1-r0) (357/368) Purging nettle (3.10.2-r0) (358/368) Purging pixman-dev (0.46.4-r0) (359/368) Purging pixman (0.46.4-r0) (360/368) Purging sqlite-dev (3.53.3-r0) (361/368) Purging sqlite-libs (3.53.3-r0) (362/368) Purging sqlite (3.53.3-r0) (363/368) Purging readline (8.3.3-r1) (364/368) Purging utmps-libs (0.1.3.4-r0) (365/368) Purging skalibs-libs (2.15.1.0-r0) (366/368) Purging xorgproto (2025.1-r0) (367/368) Purging xz-libs (5.8.3-r0) (368/368) Purging zlib-dev (1.3.2-r0) Executing busybox-1.38.0-r1.trigger OK: 426.9 MiB in 105 packages >>> yosys: Updating the testing/x86 repository index... >>> yosys: Signing the index...